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Rambus INC

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  • SPE Applications/Validation Engineering

    San Jose, CA, US; Johns Creek, GA, US

    unspecified $158K-$293K

    SPE Applications/Validation Engineering San Jose, CA, US; Johns Creek, GA, US Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr Principal Applications Engineer with DRAM and failure analysis expertise to analyze and debug complex technical issues involving DRAM, memory interface chips, DIMM, server and BIOS operation and interaction. This individual will support international customers of Rambus DDR4 and DDR5 memory interface chips in South Korea and Asia. You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work. Responsibilities Analyze and debug complex technical issues involving server memory and manage customer issues to a satisfactory conclusion. Support technical qualification of new chip designs to secure customer design wins. Assist with validation and debug of new memory interface chips for DDR5 servers. Collect and analyze signal integrity data at the system level. Conduct failure analysis and prepare failure analysis and 8D reports. Gather customer technical feedback and communicate to Marketing and Engineering teams. Present technical updates to customers and company management in writing and verbally via quality presentations. Prepare technical documentation such as datasheets, user guides and application notes. Qualifications Familiar with DDR4/DDR5 DIMM memory operation in Intel, AMD, and/or OEM servers.

  • SPE Signal Integrity Engineer

    Johns Creek, GA, US; San Jose, CA, US; San Jose, UNAVAILABLE, US; Bangalore, UNAVAILABLE, IN; UNAVAILABLE, UNAVAILABLE, Seoul

    unspecified $134K-$249K

    SPE Signal Integrity Engineer Johns Creek, GA, US; San Jose, CA, US; San Jose, UNAVAILABLE, US; Bangalore, UNAVAILABLE, IN; UNAVAILABLE, UNAVAILABLE, Seoul Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Principal Engineer with signal integrity and package design experience to join our Memory Interface Chips BU's engineering team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As an SPE Signal Integrity Engineer, you will be reporting to the VP of Engineering and is a Full Time position. In this highly visible role, you will work within our SI/PI team to work on modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) in the very challenging DDR field with speed up to 12800+ MT/s. Responsibilities Create SI/PI methodologies and work with the Design and SI teams to do SI/PI study and package design for the latest DDR product portfolio Work with our design team and validation team to define specifications and system design requirements such as packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations and jitter sensitivity analysis Provide guideline to design team based on SI/PI study and simulation and silicon correlation so that our products will have superior SI performance, i.e. best RMT scores Work with our customers to do collaboration to find the optimum SI/PI solution Help the team during debug and bring up in lab if needed

  • Technical Director Validation

    Johns Creek, GA, US

    unspecified $161K-$298K

    Technical Director Validation Johns Creek, GA, US Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Technical Director Validation Engineer to join our Memory Interface Chip business unit. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. The Technical Director Validation Engineer is a Full-Time position and the candidate will work in the lab to automate data collection and provide framework to develop validation environment to check system performance and specification compliance. The candidate is required to have experience with processor-memory interfaces, including DDR topologies and protocols, as well as high-speed signaling, including signal integrity and power integrity concepts. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Lab bring-up and validation of high-speed memory buffer semiconductor products. Develop test methodologies for validating silicon designs against specifications. Develop scripts for automating lab equipment and for analyzing lab data. Lead validation tasks on bench planning, preparation, characterization execution, methodology improvements. Work with silicon design teams to develop experiments, drive data collection, and present results analysis. Provide inputs to FPGA, system, and PCB design requirements. Support Applications Team in understanding and resolving customer issues. Qualifications Experience in Bench testing and characterization of high speed and/or memory IO devices, exposure to DDRx characterization is preferable.

  • Lead MTS Program Management

    Rotterdam, UNAVAILABLE, NL; Vught, UNAVAILABLE, NL; Montreal, UNAVAILABLE, CA

    unspecified Salary not disclosed

    Lead MTS Program Management Rotterdam, UNAVAILABLE, NL; Vught, UNAVAILABLE, NL; Montreal, UNAVAILABLE, CA Overview We are seeking an experienced Program Manager with a strong technical foundation and a proven track record of delivering complex, multi‑disciplinary programs. In this role, you will lead cross‑functional initiatives, manage program roadmaps, and ensure successful execution from concept to completion. You will work closely with engineering, product management, and cross‑region stakeholders to drive alignment, remove roadblocks, and keep programs running smoothly. This role is based in either our Montreal office or our Netherlands locations. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Lead and manage end‑to‑end program execution across multiple engineering teams. Develop and maintain program plans, schedules, milestones, and metrics. Proactively identify risks, dependencies, and resource gaps, and drive mitigation plans. Facilitate effective communication across engineering, product, quality, and operations teams. Drive cross‑functional alignment on requirements, scope, timelines, and deliverables. Report program status, progress, and risks to leadership and key stakeholders. Continuously improve program management processes and operational efficiency. Qualifications 5 to 10 years of experience as a Program Manager in a technical environment. Engineering degree (Electrical, Computer, Mechanical, Software, or related). Demonstrated experience managing complex technical programs with multiple stakeholders. Strong communication, leadership, and problem‑solving skills. Ability to work effectively across global teams and time zones. Preferred Qualifications (Nice to Have) Experience in the

  • SMTS Verification Engineering

    Bangalore, KA, IN

    unspecified Salary not disclosed

    SMTS Verification Engineering Bangalore, KA, IN Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional SMTS Verification Engineer to join our Memory Interface chips team in Bangalore . In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. As a SMTS Engineer, you'll play a pivotal role in (DDR Verification, starting from understanding the design till Verification sign-off, and also to support the Validation team post-tapeouts ). In this full time role, you'll report directly to our Director. Our MIC team is dedicated to produce high speed DDR products at a high quality to meet the industry requirements, and your contributions will be instrumental in closing the Verification requirements of these products. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work Responsibilities Understand the product requirements from the specifications and beyond Planning and execution to meet the verification sign-off criteria Develop test plans, tests and verification infrastructure for complex Block level / IP / Sub-system using UVM methodology Guide and mentor the team to meet the sign-off requirements Work with architects, designers and post-silicon teams Qualifications Bachelor's or Master's degree in Electronics with 5+ years of relevant experience Expertise in System verilog and UVM Strong debugging

  • MTS Analog Engineering

    Bangalore, KA, IN

    unspecified Salary not disclosed

    MTS Analog Engineering Bangalore, KA, IN Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional MTS Engineer Analog Design to join our memory interface chip design team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a MTS Analog Engineer - Analog Design, the candidate will be reporting to Sr Manager Engineering and is a Full-Time position. The candidate will be leading the analog mixed signal circuit design activities for high-performance mixed signal chip products. Rambus memory interface chips team delivers the most advanced chipset solutions for server memory sub-system. This role gives opportunities to invent solutions to improve performance of next generation high-performance mixed signal products and learnings opportunities working through all the phases of chip product design all the way from concept to volume production. Responsibilities Ownership of Analog/Mixed designs at chip and/or block level. Define optimal architectures to achieve competitive product specifications. Design, simulate and characterize high-performance and high-speed circuits (e.g. Transmitter, Receiver, LDO, PLL, DLL, PI circuits). Create high level models for design tradeoff analysis and behavior model for verification simulations. Create floorplan and work with layout team to demonstrate post extraction performance. Document analysis and simulation to show that design achieves critical electrical, timing parameters and pre-silicon verification flow. Mentor/Manage junior team members and cultivate a growth mindset among team to encourage collaboration & inclusion. Participate and drive post silicon validation, debug,

  • SMTS Foundry Technology

    Taipei, UNAVAILABLE, JP

    unspecified Salary not disclosed

    SMTS Foundry Technology Taipei, UNAVAILABLE, JP Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional SMTS Foundry Technology to join our Operations Engineering team in Taiwan. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. As a SMTS Foundry Technology, you'll play a pivotal role in new product Introduction and production yield improvement. In this full time role, you'll report to our Director Foundry Technology. Our Foundry Technology group is dedicated to new products introduction and to transfer to our OSAT's, and your contributions will be instrumental in the New product development and Revenue. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Collaborate with foundries & internal teams on yield issue investigation and resolution Execute tapeouts to foundries Work with supply chain team on wafer WIP management. Work with design & CAD team on technology enablement. Qualifications S/M.S in Electrical Engineering or equivalent experience. Foundry technology experience especially experience with TSMC Yield improvement experience Knowledge in FinFet technology is a plus Knowledge in BCD technology is a plus Ability to learn and solve problems. Comfortable with collaboration, open communications and reaching across functional borders. About Rambus Rambus is a global company that makes

  • Hardware Design Engineer

    Hillsboro, OR, US

    hybrid $107K-$198K

    Hardware Design Engineer Hillsboro, OR, US Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional HW Design Engineer to join our MCG team in Hillsboro. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Design architecting and trade-off analysis RTL coding and verification Memory Controller + PHY integration and verification Customer delivery and support Qualifications Strong System Verilog/Verilog RTL design expertise Questa/Incisive/VCS simulator experience Python/Perl/Tcl scripting experience Significant ASIC and/or FPGA design experience Ability to learn quickly and work independently Solid communication and project management skills 5+ years of logic design experience BSEE Definite Plus: ASIC synthesis, timing constraint, CDC/RDC experience Verification experience Memory (HBM, GDDR, LPDDR, DDR) expertise AMBA AXI or CHI design experience Located in the Hillsboro, Oregon area Training: Provided as needed About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our

  • MTS Verification Engineering

    Marseille, UNAVAILABLE, FR

    unspecified Salary not disclosed

    MTS Verification Engineering Marseille, UNAVAILABLE, FR Overview Rambus, a premier chip, and silicon IP provider, is seeking to hire an exceptional mid-level Design and Verification Engineer to join our PHY integration team in Sofia, Bulgaria. The successful candidate will participate in pre-silicon RTL Design and Verification activities related to PCIe Controller Soft IP development and PHYs integrations, on leading-edge PCI-Express and CXL controller technologies. This is a Full Time position. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite while also allowing for two days of remote work if you are located in Sofia. Responsibilities Verilog RTL design in order to integrate different IPs together such as PCIe IP with vendor PHY module Verifying the IP integration with dedicated simulation environment Development and support test cases of different verification environments Support worldwide customers on the IP integration Get familiar to existing verification process, propose improvements Maintain the traceability from the customer specification or the product specification to the architecture and verification results. Track and maintain verification productivity metrics Reporting periodically on progress and difficulties Qualifications "Can Do" Attitude Bachelor or Master's degree in Electronics Engineering, Computer Science, or related disciplines Strong analytical and problem-solving skills Excellent interpersonal skills Open for traveling abroad Work in international organization and specially with teams in France, USA, Taiwan and India Because Rambus operates internationally, very good English is important for

  • VP Global Operations

    San Jose, CA, US

    unspecified $244K-$452K

    VP Global Operations San Jose, CA, US Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional VP of Operations to join our Operations Business Unit in San Jose, CA. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. In this role, you'll be accountable for end-to-end operational execution, ensuring on-time delivery, cost competitiveness, supply continuity, and continuous productivity improvement. The VP of Operations will build and run a resilient global operations organization spanning foundry and OSAT management, materials strategy, planning, logistics, NPI/production ramp, and operational risk management-while partnering closely with Engineering, Marketing, Sales, Finance, and key external manufacturing partners. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Establish operational governance for allocation, prioritization, and revenue attainment during constraints. Establish supply risk assessment and mitigation plans: geopolitical risk, node constraints, single-source dependencies, logistics disruptions, and disaster recovery. Build business continuity playbooks: alternate sites, qualified alternates, safety stock strategy, and rapid reallocation processes. Work in a fast-paced, exciting environment with strong business acumen to drive value to business Works collaboratively and cross functionally to meet the businesses needs and optimize revenue and margin Identifies risks and problems in timely manner and drives resolution with speed

  • Principal Field Applications Engineer

    San Jose, UNAVAILABLE, US

    hybrid $108K-$200K

    Principal Field Applications Engineer San Jose, UNAVAILABLE, US Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional PE Field Application Engineer to join our Sales team. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Contribute to Rambus revenue growth through direct and indirect technical activities. Develop a solid technical understanding of our products and relevant solutions. Provide deep technical support to customers to meet or improve upon customer's requirements with Rambus products, specifically RCD, CKD, PMIC, SPD and TS. Provide thorough customer design support including schematic and PCB layout review Identify and develop new business opportunities to grow Rambus business. Gather potential market moves and competitors' activities for Rambus product strategy. Qualifications Bachelor in Electronics or Electrical Engineering with 5+ years of Registering Clock Driver (RCD) or power management IC (PMIC) experience. Experience with JEDEC memory standard, Intel and/or AMD memory subsystem requirements and specifications preferred. Ability to interface directly with customers and solve customer problems. Ability to work independently with strong analytical skills, self-motivated and excellent interpersonal skills. Ability to communicate at all levels written and oral. About Rambus Rambus is a global

  • Director/Sr Manager - Silicon IP Sales

    San Jose, CA, US

    unspecified $148K-$274K

    Director/Sr Manager - Silicon IP Sales San Jose, CA, US Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Director, Sales to join our Sales team in San Jose, CA. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. As a Director, Sales, you'll play a pivotal role in (add brief overview of key responsibilities and impact). In this full-time role, you'll report directly to our Sr Director, Sales. The focus of this Sales role is to develop and grow our Interface IP and Security business, with focus on strategic customer relationships and opportunities. Main responsibility is to achieve assigned sales targets by developing and maintaining customer accounts. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote wor Responsibilities Develop and execute business growth plans for key strategic accounts Accountable to deliver Revenue, Gross Margin, and Design Win Revenue goals Forecasting long-term demand and near-term revenue Responsible for assessing current opportunities, resources, and capabilities needed to meet or exceed sales plan Responsible for developing and executing innovative sales approaches to drive revenue and profitability growth Maintain and grow the existing customer base while increasing Rambus' focus on pursuing and investing in new high-value accounts Work with