Technical Director Validation

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 13, 2026

Salary

$161K-$298K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

97% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Director Plus From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Technical Director Validation Johns Creek, GA, US Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Technical Director Validation Engineer to join our Memory Interface Chip business unit. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. The Technical Director Validation Engineer is a Full-Time position and the candidate will work in the lab to automate data collection and provide framework to develop validation environment to check system performance and specification compliance. The candidate is required to have experience with processor-memory interfaces, including DDR topologies and protocols, as well as high-speed signaling, including signal integrity and power integrity concepts. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Lab bring-up and validation of high-speed memory buffer semiconductor products. Develop test methodologies for validating silicon designs against specifications. Develop scripts for automating lab equipment and for analyzing lab data. Lead validation tasks on bench planning, preparation, characterization execution, methodology improvements. Work with silicon design teams to develop experiments, drive data collection, and present results analysis. Provide inputs to FPGA, system, and PCB design requirements. Support Applications Team in understanding and resolving customer issues. Qualifications Experience in Bench testing and characterization of high speed and/or memory IO devices, exposure to DDRx characterization is preferable.

Read the full description at careers-rambus.icims.com. FewerJobs shows a preview and links to the original posting.