SPE Applications/Validation Engineering
Rambus INC - San Jose, CA, US; Johns Creek, GA, US
Posted May 1, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified checked Jun 13, 2026
- Salary
- $158K-$293K From the posting source checked Jun 20, 2026
- 401(k) match
- Reported from DOL Form 5500 industry filing (not employer-specific)
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Market context
- U.S. role benchmark (BLS OEWS)
- $116,543 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +9.8% - Much faster than average
93% above the BLS role benchmark for software engineering aggregate.
Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Role
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Company
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
SPE Applications/Validation Engineering San Jose, CA, US; Johns Creek, GA, US Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr Principal Applications Engineer with DRAM and failure analysis expertise to analyze and debug complex technical issues involving DRAM, memory interface chips, DIMM, server and BIOS operation and interaction. This individual will support international customers of Rambus DDR4 and DDR5 memory interface chips in South Korea and Asia. You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work. Responsibilities Analyze and debug complex technical issues involving server memory and manage customer issues to a satisfactory conclusion. Support technical qualification of new chip designs to secure customer design wins. Assist with validation and debug of new memory interface chips for DDR5 servers. Collect and analyze signal integrity data at the system level. Conduct failure analysis and prepare failure analysis and 8D reports. Gather customer technical feedback and communicate to Marketing and Engineering teams. Present technical updates to customers and company management in writing and verbally via quality presentations. Prepare technical documentation such as datasheets, user guides and application notes. Qualifications Familiar with DDR4/DDR5 DIMM memory operation in Intel, AMD, and/or OEM servers.
Read the full description at careers-rambus.icims.com. FewerJobs shows a preview and links to the original posting.
Apply link not verified; last alive Jun 13, 2026.
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