Packaging Assembly Engineer

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 13, 2026

Salary

$181K-$318K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

114% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Packaging Assembly Engineer Austin Metro Area, United States of America Do you like to work on ground breaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip-chip BGA (FCBGA) assembly process from pathfinding, NPI through high-volume manufacturing by defining assembly baseline processes, deciding package BOM, establishing package design rules that are optimized for performance, reliability, yield and cost for a variety of projects including SoC. Responsible to lead packaging assembly technology development. Work with cross functional team and lead SoC Package development efforts. Package architecture / Package integration Innovation Work with foundry and OSAT to bring packaging solution from concept to HVM. Drive industry with advanced Package solutions, new material development, and specs. Minimum 5% International travel. Define and optimize end‑to‑end FCBGA assembly process flow (wafer back‑end interface, flip‑chip attach, underfill, lid/heat spreader attach, ball attach, singulation, final inspection). Develop and maintain process documentation including process specs, work instructions, control plans, PFMEA, and process flow diagrams. Plan and execute DOEs to improve yield, quality, and cost; analyze data using SPC and other statistical tools, and drive closure on findings. Lead root‑cause analysis and corrective actions for assembly excursions, yield issues, and customer returns, in collaboration with quality, reliability, and FA teams. Partner with substrate and

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