RF/Microelectronics Packaging Engineer
Viasat INC - Tempe, Arizona
Posted Apr 9, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified checked Jun 13, 2026
- Salary
- $156K-$246K From the posting source checked Jun 20, 2026
- 401(k) match
- Reported from DOL Form 5500 industry filing (not employer-specific)
Was this benefit information wrong? Tell us.
Market context
- U.S. role benchmark (BLS OEWS)
- $116,543 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +9.8% - Much faster than average
72% above the BLS role benchmark for software engineering aggregate.
Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Role
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Company
- Equity
- Offered Verified - SEC 10-K source checked Jun 20, 2026
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
RF/Microelectronics Packaging Engineer Tempe, Arizona About us One team. Global challenges. Infinite opportunities. At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We're looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team. What you'll do The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also involves managing packaging efforts related to radio frequency communication devices. The products range from IC's, System In Packages, sub-assemblies, and modules. The packaging development process includes package definition, stack-up, substrate layout, bond diagram, drawings, predictive modeling combined with system testing, technical risk/cost assessment, materials and process characterization, compilation of formal documentation, collaborating with sub-contractors and internal assembly and reliability resources, and final release of product. The day-to-day Job responsibilities include but not limited to: Working closely with project development teams and product groups (RFIC, MMIC, Module) to develop the next generation/sophisticated/novel packaging solution for RF communication products Define packages and materials that meet product requirements for reliability, performance, manufacturability, and cost. Ensure all packaging work is completed for New Product and New Technology Introductions Develop and manage packaging documentation including SOWs, package drawings, and process flows Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers Ensure
Read the full description at careers-viasat.icims.com. FewerJobs shows a preview and links to the original posting.
Apply link not verified; last alive Jul 14, 2026.
What verified means
Verified means a displayed claim has field-level provenance to a source FewerJobs pulled: a government or employer source, or the original job posting. Posting-sourced facts are employer-stated and are labeled separately from government records.
Related jobs
-
Hardware Engineer, Product Engineering
Viasat INC - Tempe, Arizona
-
Photonic Packaging Engineer
Cisco - Carlsbad, California, US
-
RF Electronic Warfare Applications Engineer
Viavi Solutions INC - Wichita, KS USA
-
RF Microwave Design Engineer - Level 3 or 4
Northrop Grumman - United States-Arizona-Gilbert