HW Board Design Engineer
Cisco - San Jose, California, US
Posted May 12, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified last checked Jun 13, 2026
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
HW Board Design Engineer San Jose, California, US The application window is expected to close on: 05/08/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team: The Hardware Team is responsible for leading the hardware development through all phases of product design, from concept and architecture to production and support. Our engineers handle every aspect of chip development, from definition and architecture to silicon bring-up, validation, and system integration. This role combines strong technical expertise with leadership, planning, and cross-functional collaboration. Your Impact: The HW Board Design for Silicon one EVB's is responsible for hardware board design activities with a strong focus on test, qualification, and readiness for production. This role spans all phases of hardware development, from architecture and design through bring-up, validation, and qualification, combining deep technical expertise with leadership and cross-functional coordination. Key Responsibilities: Work with the hardware engineering team focused on board design, test, and qualification Define hardware architecture and board-level design strategy with test, qualification, SI, and PI requirements in mind Oversee schematic design, PCB layout, and component selection Review designs for quality, reliability, cost, manufacturability, testability (DFM/DFT), signal integrity (SI), and power integrity (PI) Own test readiness, including support for bring-up, debugging, validation, and qualification Manage schedules, task prioritization, and resource allocation Work closely with FW, SW, mechanical, QA, test, and manufacturing teams Drive design reviews, SI/PI risk analysis, and technical decision-making Support transition from prototype to qualified hardware
Read the full description at cisco.wd5.myworkdayjobs.com. FewerJobs shows a source-linked preview and links to the original posting.
Apply link verified; last checked Jun 13, 2026.
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