ASIC Design Engineering Technical Lead (Hybrid)

Benefits

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Non-birth-parent leave

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Family-building benefits

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Learning budget

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Verification

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Salary

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Schedule

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Weekend work

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Application

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Deadline

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About this role

ASIC Design Engineering Technical Lead (Hybrid) San Jose, California, US The application window is expected to close on: 05/29/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . This position requires that you live within commuting distance of our San Jose, CA office and commute to the office 4-5 days per week. MEET THE TEAM Cisco Silicon One (#CiscoSiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world's most complex networks and carry over 90% of IP traffic. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. We are a highly specialized ASIC team with experts in all aspects of Front-End design including the development of programmable, scalable silicon architectures that power next-generation networking products.. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry! YOUR IMPACT Define, design and take end to end Front-End ownership of ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Help define

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