Cadence Design Systems, Inc. jobs

Principal Software Engineer (UI Engineer) BANGALORE posted: Posted 30+ Days Ago

System Integration Lead, Pixel Watch Mountain View, CA, USA As a member of a fast-paced multi-disciplinary team, you use your creativity and range of engineering experience to explore solutions to a variety of engineering problems. As a mechanical engineer, you participate in the design, analysis, and prototyping of new concepts. You work in a manufacturing and product oriented development environment and collaborate with vendors and outside sources in order to see parts through to manufacture. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $236000 - $330000 (USD) + 25% bonus target + bonus + equity + benefits Learn more about benefits at Google . Identify, integrate, and validate cutting-edge technologies to enhance the next iteration of our products. Collaborate closely with a team of system architects, industrial designers, and product managers, contributing to the early definition of new products and the exploration of emerging technologies. Be able to maximize comfort and fit within an iconic design, all while delivering performance. Ensure seamless integration of these new technologies into the product line, encompassing module and system design, validation, and correlation. Partner with our operations teams during the early stages of system integration to establish and maintain high quality and yield standards. Minimum qualifications: Bachelor's degree in Mechanical Engineering, Product Design, or related field, or equivalent practical experience. 12 years of experience designing mechanical components such as plastic or metal parts, mechanical assemblies, printed circuit boards, or flexes. 12 years of experience using Computer-Aided

Cloud Support Engineer - Managed Cloud Services SAN JOSE posted: Posted Yesterday

Design Verification Engineer - SoC Austin About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary We are seeking a Design Verification Engineer to join our Systems/Performance Verification team. You will ensure the custom IPs powering Sohu - including systolic arrays, DMA engines, and NoCs - are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. Key responsibilities - Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon). - Work closely with software and application developers on identifying performance bottlenecks and tuning the software. - Develop test plans and test infrastructure/tools for performance tuning, correlation, and verification. - Improve and maintain the architectural performance models. - Develop tests in SystemVerilog, Python, or vectors to debug and correlate the RTL and performance model. - Develop SystemVerilog or Python-based checkers for verifying the performance

Lead MTS Physical Design/STA Bangalore, KA, IN Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Lead Static Timing Analysis Engineer to join our STA team in Bangalore. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. Responsibilities Complete ownership of Static timing analysis at full chip level for high speed mixed signal design Experience doing multi-mode multi-corner (MMMC) timing and power analysis using primetime/Tempus. Experience in DMSA/Tweaker ECO flows for PPA improvements. Experience in manual timing fixes, ECO generation for MCMM mode corners. Good understanding of SDC constraints and able to translate timing requirements into constraints. Responsible for integrating the blocks, analog Ip's for full chip timing analysis. Well aware of place and route methodologies and hands on experience with timing convergence Good communication skill to negotiate with top level for convergence. Work closely with Project leader for creating schedule, tracking and raising issues / risks to project management. Participate in Mentoring new joiners in the group on technical skills. Provide inputs for CAD/DA team from Design Implementation perspective. Work closely with Logic design team and Analog teams to provide inputs from physical design and STA. Work closely with DFT team on scan aspects and provide inputs from physical design. Continuously work on methodology and productivity improvements. Qualifications Must have at least 10 - 12 years of experience, out of which

SoC Physical Design Methodology Engineer Austin, United States of America Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! Come help us design the next generation of revolutionary Apple products. We're looking for a forward-thinking and unusually talented engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft and implement methodologies with a high impact on upcoming products that will delight and inspire millions of Apple's customers every single day. In this role, you'll be directly involved in our physical design methodology efforts, collaborating right alongside our internal multi-functional teams to ensure our SoCs achieve the optimal power, performance, and area (PPA) in the most efficient way possible. We account for every nanowatt, every nanometer, and every picosecond from theory to silicon. As a Physical Design Methodology engineer you will be an active participant in the team responsible for ensuring our physical design methodology is efficient, robust, and reliable. You will

Display System Architect, Platform Architecture Cupertino, United States of America Do you love working on state-of-the-art technologies? Are you a forward-thinker and love solving technological and architectural challenges? At Apple, our Platform Architecture team features a collaborative and hands-on environment that cultivates engineering excellence, creativity, and innovation. Join this team, and you'll collaborate with engineers across Apple to develop algorithms and architectures that help build the flawless technology experiences we're known for worldwide! In this highly visible role, you will lead the architecture of SoC display subsystem, including memory fabric interface, data pipe flow controls, memory compression, display interfaces, etc. The ideal candidate will be responsible for all aspects of SoC display subsystem architecture. Work closely with SoC and fabric architects, software, and system engineers to architect SoC display subsystem Architect display subsystems, including display pipe control, memory, and interfaces Provide detailed architectural guidance at all levels of design throughout the design process from concept through production Make recommendations on key design tradeoffs across architecture and performance Author and maintain the display subsystem architecture specifications Minimum Qualifications: BS degree Experience in chip architecture, display subsystem architecture and/or design SoC display subsystem architecture and micro-architecture experience Preferred Qualifications: 20+ years of relevant industry experience in signal/image processing MS or PhD degree Understanding of SoC display sub-system architecture, interface, performance and energy tradeoffs Understanding of display or image technology Expertise in memory subsystem, memory interface, and DMA Architectural modeling ability Communication skills with cross-functional teams

Sr. Business Development Manager - Cloud HSINCHU 05 posted: Posted 30+ Days Ago

Hardware Systems Design Engineer, Platforms Infrastructure Sunnyvale, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Our team designs and builds the hardware, software, and networking technologies that power all of Google's services. As a Hardware Design Engineer, you will design and build the systems that are the heart of a large and powerful computing infrastructure. You will see those systems from concept all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our data centers affecting millions of Google users. As a part of the Board and System Design team, you will work on hardware systems projects to craft solutions for current and future data center deployments. You will work with product teams to ensure that customer goals are met with your systems, ASIC/FPGA, Software, and Verification teams to ensure proper verification of features in your systems, manufacturing teams to ensure that your designs are manufacturable and ready for volume production, and field teams to support systems that are deployed in the data center. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google

Staff Technical Solution Engineering McLean, Virginia About Databricks At Databricks, we are passionate about enabling data teams to solve the world's toughest problems - from making the next mode of transportation a reality to accelerating the development of medical breakthroughs. We do this by building and running the world's best data and AI infrastructure platform so our customers can use deep data insights to improve their business. Founded by engineers - and customer obsessed - we leap at every opportunity to solve technical challenges, from designing next-gen UI/UX for interfacing with data to scaling our services and infrastructure across millions of virtual machines. And we're only getting started. The Role As data and Generative AI applications become increasingly foundational to public sector modernization and national security, safeguarding the infrastructure that powers them is paramount. Databricks is looking for a Staff Technical Solution Engineer to join our Cleared Engineering team in McLean, VA. This team sits at the critical intersection of core infrastructure operations and active platform reliability, ensuring our multi-cloud data enclaves and advanced AI software run flawlessly inside highly secure, air-gapped partitions. In this role, you will move beyond reactive ticketing to tackle complex system and network environment blocks, serving as a primary technical pillar for our secure GovCloud operations. This position offers a unique opportunity to own the operational integrity of high-side platform interactions. You will be responsible for executing sophisticated debugging, deep-dive environment analysis, and running specialized tooling and scripts to unblock internal engineering teams. Operating within

Senior Hardware Design Engineer, High Speed Networking Nashua, NH, United States Company Description: Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do. Job Description: Who You'll Work With Working closely with cross-functional teams including software, product management, marketing, and manufacturing, our engineers innovate new system architectures and develop high-speed PCBs requiring state-of the-art signal integrity and power integrity design practices. What You'll Do Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team

Lead Hardware Design Engineer Melbourn, , United Kingdom Company Description: We believe in the power of ingenuity to build a positive human future. As strategies, technologies, and innovation collide, we create opportunity from complexity. Our teams of interdisciplinary experts combine innovative thinking and breakthrough technologies to progress further, faster. Our clients adapt and transform, and together we achieve enduring results. We are over 4,000 strategists, innovators, designers, consultants, digital experts, scientists, engineers, and technologists. And we have deep expertise in consumer and manufacturing, defence and security, energy and utilities, financial services, government and public services, health and life sciences, and transport. Our teams operate globally from offices across the UK, Ireland, US, Nordics, and Netherlands. PA. Bringing Ingenuity to Life. Job Description: We are looking for a Lead hardware design engineer with a broad skill set and a passion for creating electronic products.. Working closely with our clients and the wider PA team, you will be called upon to develop solutions at the system level as well as take on the detailed electronic design work required to realise your concept. Our primary industry sectors are Consumer, Defence and Security, Health and Life Sciences and we look for someone who is comfortable working across all of these sectors. Sharing ideas across sectors is embedded within our way of working. Become part of the team At PA, you will be working within one of the most successful UK organisations in technology and product development, with a team who have an exceptional reputation

Physical Design/CAD Engineer San Jose, California, United States Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . As an Astera Labs Physical Design/CAD Engineer you will play a crucial role in driving the planning, coordination, and execution supporting the design of Astera Labs' portfolio of connectivity ASICs used in the world's leading cloud service providers, server and network OEMs. This role requires RTL to GDS ownership across design stages (Synthesis/PnR/STA/Signoff), deep technical expertise, and close collaboration with RTL and verification teams to ensure robust full-chip signoff. This role is fully on-site and in-person. Key Responsibilities - As Physical Design CAD Engineer you will support and build flows for world class EDA tools. - Drive various Physical Design flow related activities, ensuring robust signoff across complex SoCs or sub-systems. - Architect and recommend flow improvements and enhance existing methodology for high performance design. - Good understanding of flow development related to backend tools like Synthesis/PnR/Extraction/DRC/LVS etc. - Work with cross function teams to define requirements and specifications

iSE neo Software Engineer CESSON SEVIGNE 01 posted: Posted 4 Days Ago

Watch Systems Architect Cupertino, United States of America The Watch Systems Architecture team is seeking a hands-on engineer to help shape the future of wearable technology. As a key member of our team, you'll support the development of next-generation products through a combination of architecture work, prototyping, analysis, and technical validation. You'll have the opportunity to dive deep into system-level challenges, work closely with architects and engineers across various disciplines, and contribute to a product that impacts millions of users worldwide. We are looking for a candidate with a strong foundation in Electrical and/or Computer Engineering, experience with system design and validation, and a passion for technical problem-solving. The ideal candidate will thrive in a collaborative environment and demonstrate the ability to translate system requirements into practical implementations, simulations, and test plans. System Design & Analysis: Contribute to the architecture and design of Watch systems, working alongside senior architects to define specifications and evaluate design trade-offs. Develop simulations and analytical models to predict system behavior and validate design decisions. Particular emphasis is paid to power consumption, and conversion, Definition of PMIC (Power Management IC) and peak power management. Technical Validation & Characterization: Build prototypes and develop test plans to validate new features and system improvements. Conduct measurements and analyses to characterize performance, identify optimization opportunities, and ensure robust system operation. Data Analysis & Modeling: Create and maintain analysis scripts and tools to process measurement data, generate insights, and support design decisions. Develop simulation models to explore design spaces and predict

Product Marketing Manager (Clarity Electromagnetic) SAN JOSE posted: Posted 30+ Days Ago

Senior Principal C++ Software Engineer SAN JOSE posted: Posted 30+ Days Ago

ASIC Physical Design CAD Engineer 2 Locations Job Description Silicon One is seeking a CAD Engineer to join the Cisco Silicon One Physical Design team. Meet the Team You'll be part of the Cisco Silicon One team, which is at the heart of Cisco's software and ASIC design efforts. As part of our team, you'll contribute to the development of our next-generation network devices-Cisco Silicon One™. Our team operates in a startup-like environment within a stable and leading corporation. Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof. We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of Cisco's future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility. Cisco Silicon One is a ground-breaking, groundbreaking technology that will serve our customers and end users for decades to come. The Internet now has a new, faster, better, and safer engine! Your Impact You'll be joining our Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs. Our Backend Engineers handle all aspects of chip design, including Definition, Physical

Design Engineer New York | OnSite ABOUT WARP Warp is the AI-native Employee Management Platform for ambitious companies. Our platform includes HRIS, payroll, IT, benefits, tax compliance, and more - all built from scratch on an AI-native architecture from day 1. Warp embeds itself into every part of a company's people operating layer, we process over half a billion $ annually in payroll, on track to grow to $2B. Legacy vendors in our space built their businesses by profiting from complexity. Warp is built from day one for AI to be the primary operator, not a feature. Every advance in LLM capability widens our lead. We hire people who ship constantly, own outcomes, and care about craft. We're in the office five days a week because speed and proximity are a competitive advantage at this stage. If you want to build something that automates an entire category of core work, not just another point solution, this is the place. We've raised over $85M from top investors like Ashton Kutcher/Sound Ventures, Y Combinator, founders of Dropbox, Replit, SV Angel, and Homebrew Capital. Built by an obsessive team from MIT, Ramp, Brex, Google, Dropbox, Apple, and more. ABOUT THE ROLE Warp is a product-driven company building the future of automated back-office operations. We're looking for a design engineer who's excited to join our early story and help us maintain the highest quality bar possible. As a Design Engineer at Warp, you'll be directly responsible for curating the user experience of the next

Account Technical Executive for HPC accounts SAN JOSE posted: Posted 2 Days Ago

Hardware Systems Design Engineer - iPhone Cupertino, United States of America Do you have a feeling of deep satisfaction when a design decision that YOU were responsible for is showcased in a newly released product ? Do you just beam at the thought of “I made that!” ?Would you like to have that same feeling again, and again? The iPhone team is looking for experienced Hardware Design Engineers who are motivated by the opportunity to make design decisions, often difficult ones, that will benefit millions of iPhone users worldwide. Using your skills in Electrical Engineering as well as your board and system level knowledge, you can make a difference in so many lives! Our team is collaborative, creative and passionate about what we do and the products we make. We want to hear from you! This is a unique hardware design position that starts at product concept and continues all the way through to mass production. You will be at the center of iPhone product development with a critical impact on overall design. Lead designs that continually push the boundaries of technology and ultimately improve the iPhone user experience. Design and integration of custom hardware into constrained systems. Work daily with multi-functional technology teams in a fast-paced environment. There will be opportunities for international travel. Minimum Qualifications: BS Electrical/Computer Engineering or equivalent 5+ years industry experience Electrical engineering fundamentals including analog and high speed digital design Broad experience across different applications and technologies Design of complex system architectures Preferred Qualifications:

Staff Software Engineer Toronto, Ontario About Clutch Clutch is Canada's largest online used car retailer, delivering a seamless, hassle-free car-buying experience to drivers everywhere. Customers can browse hundreds of cars from the comfort of their home, get the right one delivered to their door, and enjoy peace of mind with our 10-Day Money-Back Guarantee. Named one of Canada's Top Growing Companies two years in a row and awarded a spot on LinkedIn's Top Canadian Startups list, we're looking to add curious, hard-working, and driven individuals to our growing team. Headquartered in Toronto, Clutch was founded in 2017. Clutch is backed by world-class investors including Canaan, BrandProject, Real Ventures, D1 Capital, and Upper90. To learn more, visit clutch.ca Technology - Full TypeScript stack for front- and back-end, with some legacy JavaScript - Front-end: ReactJS app with functional components and context API - Back-end: ExpressJS with PostgreSQL database and Sequelize ORM - Microservices architecture using Docker, Terraform, AWS ECS, and other AWS services - Interservice communication via RabbitMQ and Apache Kafka About the role Clutch is seeking a Staff Software Engineer / Engineering Lead to drive technical excellence, deliver complex solutions, and shape the future of our platform. This role requires leadership in technical decision-making, cross-functional collaboration, and innovation in architecture and system design. What you'll do - Provide pragmatic solutions to business challenges while delivering scalable, secure, and resilient systems - Champion engineering excellence through coding standards, peer reviews, and technical documentation - Collaborate with Product, Design, and Data teams to

System Mechanical Design Engineer Mountain View, CA Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! About this Role We are seeking a motivated, dedicated, and hands-on mechanical design engineer to help develop a chassis and rack platforms for the next-generation artificial intelligence server alongside a team of world-class scientists and engineers. As a Mechanical Engineer at Lightmatter, you will sit at the critical intersection of silicon photonics, advanced 3D packaging, and extreme-density thermal management. You won't just be tweaking existing designs; you will be the practical execution engine transforming complex electro-optical concepts into scalable, manufacturable hardware. While this role focuses on flawless technical execution rather than top-level project architecture, your hands-on impact will be immense. You will navigate the transition from initial CAD and prototype builds to leading external Contract Manufacturers (CMs). If you are a

Lead software enginner for LLM-infra SHANGHAI posted: Posted 30+ Days Ago