Design Verification Engineer - SoC
Etched - Austin
Posted Apr 16, 2026
Benefits
- Parental leave
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About this role
Design Verification Engineer - SoC Austin About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary We are seeking a Design Verification Engineer to join our Systems/Performance Verification team. You will ensure the custom IPs powering Sohu - including systolic arrays, DMA engines, and NoCs - are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. Key responsibilities - Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon). - Work closely with software and application developers on identifying performance bottlenecks and tuning the software. - Develop test plans and test infrastructure/tools for performance tuning, correlation, and verification. - Improve and maintain the architectural performance models. - Develop tests in SystemVerilog, Python, or vectors to debug and correlate the RTL and performance model. - Develop SystemVerilog or Python-based checkers for verifying the performance
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