ASIC Engineering Analog Design Leader:ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years

Benefits

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

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Weekend work

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Application

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Assessment

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About this role

ASIC Engineering Analog Design Leader:ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years Bangalore, India Exciting opportunity for an experienced ASIC Engineering Analog Design Leader to drive high-speed optical transceiver designs for next-gen Silicon Photonics. Lead full-chip circuit design, collaborate with top-tier teams, and shape industry-leading solutions for Cisco's data center and AI/ML platforms. Join us to make a global impact in cutting-edge networking innovation.

Read the full description at cisco.wd5.myworkdayjobs.com. FewerJobs shows a preview and links to the original posting.