ASIC Design Engineer (Onsite)

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

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Salary

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401(k) match

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Senior From the posting source checked Jun 20, 2026

Work mode

Onsite From the posting source checked Jun 20, 2026

In-office days

5 days From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

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Application

Cover letter

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Assessment

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Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

ASIC Design Engineer (Onsite) San Jose, California, United States of America Join our team as a Senior ASIC Engineer and drive the design and development of high-performance ASICs for cutting-edge Cisco platforms. Collaborate with multidisciplinary teams, lead complex projects, and shape the future of hardware innovation. Grow your career with us and make a significant impact on next-generation technology.

Read the full description at cisco.wd5.myworkdayjobs.com. FewerJobs shows a preview and links to the original posting.