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Principal ASIC Design Verification Engineer (Starshield)

SpaceX - Palo Alto, CA

Posted Apr 7, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
Not verified
Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
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Salary
$210K-$295K From the posting source checked Jun 20, 2026
401(k) match
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Market context

U.S. role benchmark (BLS OEWS)
$116,543 U.S. median for this role
Projected growth (BLS Employment Projections)
+9.8% - Much faster than average

117% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Engineering From the posting source checked Jun 20, 2026
Seniority
Principal From the posting source checked Jun 20, 2026

Schedule

Shift type
Not verified
Weekend work
Required From the posting source checked Jun 20, 2026

Company

Equity
Offered From the posting source checked Jun 20, 2026

Application

Cover letter
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Assessment
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Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

Principal ASIC Design Verification Engineer (Starshield) Palo Alto, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL ASIC DESIGN VERIFICATION ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on earth observation, communications, and hosted payloads. As an ASIC Design Verification Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security. In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. You will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace. RESPONSIBILITIES: - Responsible for digital ASIC verification at block and system level - Lead and execute verification test plan, development, and milestones from beginning to end, develop test harnesses and test sequences - Develop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocks - Responsible for test plan execution, running regressions, code and functional coverage closure - Automate test case generation by using

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