Senior Research Scientist, AI Accelerator Design and VLSI

Verified benefits

Parental leave

12 weeks

Non-birth-parent leave

12 weeks

Verified

Yes last checked unknown

Salary

$192K-$357K

401(k) match

Not verified

Market context

Median wage (BLS OEWS)

$116,543 national median

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

135% above the BLS national median for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Where they hire

State eligibility is not yet verified.

About this role

Senior Research Scientist, AI Accelerator Design and VLSI US, CA, Santa Clara Senior Research Scientist, AI Accelerator Design and VLSI /job/US-CA-Santa-Clara/Senior-Research-Scientist--AI-Accelerator-Design-and-VLSI_JR2013170 US, CA, Santa Clara Posted 30+ Days Ago

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