Tech Lead, SoC Design
Google - Mountain View, CA, USA
Posted Jun 11, 2026
Benefits
- Parental leave
- 18 weeks Verified - employer source source checked May 7, 2026
- Non-birth-parent leave
- 18 weeks Verified - employer source source checked May 7, 2026
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Source-linked checked May 7, 2026
- Salary
- $192K-$279K Verified - from the job posting source checked Jun 20, 2026
- 401(k) match
- Reported from DOL Form 5500 industry filing (not employer-specific)
Was this benefit information wrong? Tell us.
Market context
- U.S. role benchmark (BLS OEWS)
- $66,396 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +3.5% - Average
255% above the BLS role benchmark for design aggregate.
Posted salary is far from this role benchmark; treat it as low confidence.
Matched to SOC 27-1024 - Design aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Company
- Equity
- Offered Verified - from the job posting source checked Jun 20, 2026
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Tech Lead, SoC Design Mountain View, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead a team of RTL Design engineers performing tasks related to IP development and/or SOC Design. Provide technical leadership to engineers and model best design practices (i.e., micro-architecture specifications, design reviews, code reviews, design methodology, etc.). Participate with architecture and system design teams in architecture definition, die area estimation, power optimization, and performance enhancements. Work closely with the multi-site cross-functional teams: Verification, Design for Test, Physical Design and Software teams to make design decisions and represent project status throughout the development process. Define microarchitecture for a subsystem/SoC top-level. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related
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