Memory CAD Engineer

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified last checked Jun 13, 2026

Salary

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type

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Weekend work

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Application

Cover letter

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Assessment

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Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Memory CAD Engineer Zhubei, Taiwan Who You'll Work With Join the Cisco Silicon One team in developing essential building blocks for web-scale and service provider networks. Our SRAM / TCAM design team unites a circuit architect, circuit designer, CAD engineer, and manager, each bringing specialized expertise to create advanced memory solutions. We focus on technical excellence, streamlined processes, and open collaboration to deliver robust SRAM / TCAM designs and meet ambitious project goals. Committed to innovation and teamwork, we tackle complex challenges and drive the future of memory technology together. What You'll Do IP Modeling Automation: Develop and maintain automation flows for generating and validating various IP models (e.g., Behavioral/Liberty/Redhawk...) Tcl Scripting: Utilize Tcl for integration with EDA tools to build flow for IP characterization, qualification, and behavioral verification. Assist RD in integrating macro GDS and Netlists, troubleshooting and resolving EDA-related issues during IP development Who You Are * Minimum Qualifications 5 years of relevant experience with MS/BS in Electrical Engineering, Computer Science, or related fields. Tcl & Shell Mastery: Tcl scripting skills for complex string parsing and EDA tool API manipulation; proficient in Linux Shell environments. Experience in Verilog, specifically in behavioral modeling Environment Management: Build efficient IP delivery and regression environments under Linux Strong documentation and communication skills in Chinese and English *Preferred Qualifications Experience with memory IP CAD flow development Experience in EDA tool (e.g. CustomSim/StarRC/ICV/Virtuoso/Totem) Python/Perl scripting skills is a plus We do not discriminate on the basis of race, religion, color, national origin, gender, sexual

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