HW Engineer

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 13, 2026

Salary

$152K-$219K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

59% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

HW Engineer San Jose, California, US The application window is expected to close on: 03/26/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the team: The Hardware Team is responsible for leading the hardware development through all phases of product design, from concept and architecture to production and support. Our engineers handle every aspect of chip development, from definition and architecture to silicon bring-up, validation, and system integration. This role combines strong technical expertise with leadership, planning, and cross-functional collaboration. Your Impact: You will join our Cisco Silicon One team , the epicenter of Cisco's ASIC design. As a Hardware Lab Engineer you will be responsible for enabling and supporting the full lifecycle of silicon and hardware development by operating and evolving a world-class hardware lab environment. Key responsibilities: Own and manage day-to-day operation of the hardware lab supporting ASIC bring-up, EVB development, validation, and system debug. Ensure lab readiness for critical milestones such as silicon power-on, bring-up, qualification, and customer enablement. Provide hands-on technical support in the lab for EVB bring-up, debug, failure analysis Manage lab infrastructure, equipment, and resources including scopes, analyzers, power supplies, sockets, pogo pins, handlers, and automation tools. Coordinate lab usage and priorities across multiple projects and global teams. Work closely with cross-functional teams including board design, package, mechanical, thermal, SI/PI, test, production, and validation. Drive continuous improvement of lab processes, workflows, safety, and efficiency. Interface with external vendors and partners

Read the full description at cisco.wd5.myworkdayjobs.com. FewerJobs shows a preview and links to the original posting.