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Hardware SI/PI Engineering Senior Technical Leader | SI/PI, PCB, Package, VNA, TDR, HFSS, ADS, Allegro, PAM4 SERDES | 12+ years, Bangalore

Cisco - Bangalore, India

Posted Jun 11, 2026

Benefits

Parental leave
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Non-birth-parent leave
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Family-building benefits
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  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
Not verified checked Jun 13, 2026
Salary
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401(k) match
Reported from DOL Form 5500 industry filing (not employer-specific)

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Role

Role function
Security From the posting source checked Jun 20, 2026
Seniority
Senior From the posting source checked Jun 20, 2026

Schedule

Shift type
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Weekend work
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Company

Company stage
Public-company From the posting source checked Jun 20, 2026
Equity
Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter
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Assessment
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Deadline
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Where they hire

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About this role

Hardware SI/PI Engineering Senior Technical Leader | SI/PI, PCB, Package, VNA, TDR, HFSS, ADS, Allegro, PAM4 SERDES | 12+ years, Bangalore Bangalore, India Meet the Team At Cisco's Common Hardware Group (CHG), our Signal & Power Integrity (SI/PI) team is where physics meets innovation. We design and analyze the high-speed interconnects and power distribution networks that fuel Cisco's next-generation Switch, Router, and AI/ML platforms. We're looking for a Technical Lead, Signal & Power Integrity who's passionate about solving complex challenges across ASIC, package, PCB, and system levels, and who thrives at the intersection of deep technical problem-solving and hands-on mentorship. This role offers a chance to shape leading-edge networking and compute systems while working alongside some of the most talented engineers in the industry-system architects, ASIC designers, packaging experts, and fellow SI/PI specialists-driving ideas from simulation all the way to product launch. Your Impact Model and simulate high-speed links, including SerDes, IC package, and system interconnects Analyze and model power delivery networks and perform EM modeling of complex 3D structures Lead pre- and post-layout signal integrity analysis for both PCB and package designs Define stack-up strategy, PCB materials, and collaborate with vendors on DFM and manufacturability Write SI/PI design guidelines, test plans, and validation reports Support prototype bring-up, validation, and troubleshooting in the lab Partner closely with HW design, Mechanical, Power, EMC, and Diagnostics teams to deliver world-class hardware Mentor and guide junior SI/PI engineers, fostering a culture of learning and technical excellence Drive continuous improvement of simulation flows, design

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Apply link verified; last checked Aug 10, 2026.

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