Hardware Engineer (High-speed IO/Testing) (Onsite)

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 13, 2026

Salary

$152K-$222K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

61% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Work mode

Onsite From the posting source checked Jun 20, 2026

In-office days

5 days From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Hardware Engineer (High-speed IO/Testing) (Onsite) San Jose, California, US The application window is expected to close on: 06/26/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . This position requires that you commute to the San Jose, CA office 5 days a week. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry. Your Impact In this role, you will be developing cutting-edge next-generation high-speed interconnect for deployment in data centers around the world. You will lead the activities of supporting internal and external customers with all requests related to Silicon One high-speed interfaces, including the development of new features and bug fixes. Other responsibilities include: Develop and execute electrical characterization testing for high-speed interconnect devices Support characterization, validation, compliance, and system integration of Silicon One devices Work with

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