ASIC Design Verification Technical Leader

Benefits

Parental leave

Not verified

Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified checked Jun 13, 2026

Salary

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401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$66,396 U.S. median for this role

Projected growth (BLS Employment Projections)

+3.5% - Average

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Design From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Work mode

Hybrid From the posting source checked Jun 20, 2026

In-office days

2 days From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

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Company

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

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Assessment

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Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

ASIC Design Verification Technical Leader Armenia This is a hybrid role with four days per week at Cisco's Yerevan office. Meet the team Join a dynamic group dedicated to ensuring robust test infrastructure for cutting-edge hardware solutions. Our team collaborates closely with design and product development teams, playing a pivotal role in the integration and validation of test logic throughout the development lifecycle. With a diverse mix of experienced engineers, the team thrives on innovation, problem-solving, and mutual support. The fast-paced, collaborative environment provides opportunities to learn and grow while working on industry-leading technologies. What's exciting is the chance to influence product quality and reliability at a foundational level. Your impact Drive comprehensive test planning and develop advanced test benches to ensure design integrity. Collaborate with cross-functional teams to integrate and validate test logic at every phase of implementation. Utilize scripting and debugging tools to streamline verification workflows and identify issues efficiently. Apply your expertise to optimize test processes and enhance product quality. Deliver critical verification solutions that directly impact the success and reliability of our products. Minimum qualifications Bachelor's or Master's Degree in Electrical or Computer Engineering or any related field. 7+ years of experience in design verification. Prior experience in test planning based on complex design specifications. Proficiency in testbench development using System Verilog. Debugging experience preferably using DVE and Verdi. Strong scripting skills with at least one of Tcl, Python and Perl. Knowledge of constrained-random verification and functional coverage. Knowledge of ASIC design flow and verification methodologies.

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