Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Cisco - San Jose, California, US
Posted May 12, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified last checked Jun 13, 2026
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Market context
- Median wage (BLS OEWS)
- $111,944 national median
- Projected growth (BLS Employment Projections)
- +13.7% - Much faster than average
83% above the BLS national median for data and ml aggregate.
Matched to SOC 15-1252 - Data and ML aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Analog/mixed-signal IC Design Engineer - Acacia (Hybrid) San Jose, California, US The application window is expected to close on: 03/31/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . The application window is expected to close on 5/26/26. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This is a hybrid role that can be performed three days per week from our San Jose, CA office. Meet the Team Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design. Acacia takes pride in providing and fostering a collaborate environment in order ensure success and personal growth. Your Impact As a member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical communications products. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products. You will lead efforts for a large block on a
Read the full description at cisco.wd5.myworkdayjobs.com. FewerJobs shows a source-linked preview and links to the original posting.
Apply link verified; last checked Jun 13, 2026.
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