Principal Engineer, Analog Mixed-Signal IC Layout

Benefits

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Market context

Median wage (BLS OEWS)

$116,543 national median

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

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Weekend work

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About this role

Principal Engineer, Analog Mixed-Signal IC Layout Bengaluru, Karnataka, India Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Job Overview: As an Analog Mixed-Signal IC Layout Lead Engineer, you will play a critical role in designing advanced node Bi-CMOS / CMOS products. You will be responsible for managing chip top-level layout and integration along with block level layout design and ensuring successful tapeout. You will work to build state-of-the art high speed circuits minimizing layout parasitics, while applying techniques to reduce skew and crosstalk. Meeting EM/IR compliance requirements is essential. You will ensure strict adherence to DRC, LVS, ANT, and density rules. Additionally, awareness of ESD and latch-up design practices is expected to ensure robust and reliable layout implementations. You will apply a solid foundation in device physics, along with demonstrating a strong three-dimensional understanding of device layout. You will collaborate with a dynamic, cross-functional team of analog designers and layout engineers across multiple time zones. We are looking for a highly motivated, team-oriented individual who

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