Physical Synthesis CAD Engineer

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 13, 2026

Salary

$147K-$272K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

80% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Physical Synthesis CAD Engineer Austin, United States of America Do you want to directly impact the performance of every iPhone, iPad, and Mac? You'll push the boundaries of physical synthesis for Apple's cutting-edge processors, solving problems that determine whether our next-generation CPUs, GPUs, and NPUs can deliver breakthrough performance while maintaining industry-leading power efficiency. You'll own the synthesis challenges that matter most to Apple Silicon. You will apply your hands-on skills in developing, improving and supporting the implementation flow from RTL through GDS signoff. You will be directly responsible to improve physical synthesis techniques through innovative scripts, flows and automation. As the synthesis and flow expert, you'll partner closely with design teams to define what works best for their specific challenges. You'll develop the methodologies, tools, and optimized flows that enable design teams to achieve breakthrough PPA results. You'll push beyond conventional synthesis limits - developing innovative techniques and proving their effectiveness by running full validation flows from RTL through place-and-route and timing signoff to show actual PPA improvements. Your optimizations will directly translate to faster, more efficient Apple devices. You'll work directly with EDA vendors to shape tool roadmaps, build custom solutions for problems that push beyond industry standards, and see your work ship in millions of devices. Develop breakthrough physical synthesis techniques and validate them with full implementation flows (PNR, STA, power analysis) Apply advanced RTL optimization techniques to achieve substantial improvements in performance, power, and area (PPA) Partner with design teams to define optimal methodologies and flows,

Read the full description at jobs.apple.com. FewerJobs shows a preview and links to the original posting.