CPU Top-Level Design Verification Engineer
Apple - Santa Clara, United States of America
Posted Apr 14, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified last checked Jun 13, 2026
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
CPU Top-Level Design Verification Engineer Santa Clara, United States of America Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it! Join us to help deliver the next groundbreaking Apple product. In this highly visible role, you will be at the center of a chip design effort interfacing with many disciplines, with a critical impact on getting high quality products to millions of customers quickly. As a CPU Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower power processor design, you will have the responsibilities as follows: • Work closely with verification engineers and RTL designers on defining effective verification methodology for low power complex processor design • Develop test plans, test benches, and test environments • Develop tests in assembly, and C/C++ • Drive and develop the tools and flows for advanced verification methodology • Developing, verifying, and maintaining efficient testbench environments • Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered Minimum Qualifications:
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