Circuits Physical Design Engineer - Library/Process Monitor
Apple - Beaverton, United States of America
Posted May 5, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified last checked Jun 13, 2026
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Market context
- Median wage (BLS OEWS)
- $111,944 national median
- Projected growth (BLS Employment Projections)
- +13.7% - Much faster than average
79% above the BLS national median for data and ml aggregate.
Matched to SOC 15-1252 - Data and ML aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Circuits Physical Design Engineer - Library/Process Monitor Beaverton, United States of America Do you have a passion for crafting entirely new solutions? As part of our Digital Design Engineering group, you'll take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Your efforts will be groundbreaking. Your efforts will be groundbreaking. Join us, and you'll help design the tools that allow us to bring customers experiences they've never before envisioned! We have an extraordinary opportunity for Physical Design Engineers. In this highly visible role, you will be at the heart of a processor design effort, working with foundation IP developers on silicon validation, making a critical impact delivering products to market quickly. Imagine yourself at the center of our SOC design effort, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new insights, as well as work with a team of hardworking engineers. As a Physical Design Engineer, you will be responsible for fully comprehensive library EDA view validation, by taking a P&R block through RTL to GDS steps. This will include physical synthesis, placement, CTS, routing, timing optimization, leakage recovery and closure & signoff. You will also be responsible for PT/spice correlation, signal and power EM analysis, IR analysis and PDV. You will also architect and compose
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