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FPGA Verification Engineer, Air Vehicles

Anduril - Costa Mesa, California, United States

Posted Jun 9, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
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Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
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Salary
$123K-$171K From the posting source checked Jun 20, 2026
401(k) match
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Market context

U.S. role benchmark (BLS OEWS)
$116,543 U.S. median for this role
Projected growth (BLS Employment Projections)
+9.8% - Much faster than average

26% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Engineering From the posting source checked Jun 20, 2026
Seniority
Mid From the posting source checked Jun 20, 2026

Schedule

Shift type
Not verified
Weekend work
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Company

Equity
Offered From the posting source checked Jun 20, 2026

Application

Cover letter
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Assessment
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Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

FPGA Verification Engineer, Air Vehicles Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB We are looking for a FPGA Verification Engineer to join our rapidly growing team in Costa Mesa, CA . You will own verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics, with a focus on UVM-based methodology and coverage-driven verification. This will require expertise in SystemVerilog, object-oriented programming, and UVM. If you are someone who has supported rapid avionics development, then this role is for you. WHAT YOU'LL DO - Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs - Develop verification plans with traceability to system and hardware requirements - Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks - Build functional coverage models and drive code coverage analysis to closure - Develop constrained-random and transaction-level test sequences

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