Verification Engineer

Benefits

Parental leave

6 weeks From the posting source checked Jun 20, 2026

Non-birth-parent leave

6 weeks From the posting source checked Jun 20, 2026

Family-building benefits

• Fertility benefits: Offered From the posting source checked Jun 20, 2026
• Adoption assistance: Offered From the posting source checked Jun 20, 2026
• Surrogacy assistance: Not verified

Mental health support

Offered From the posting source checked Jun 20, 2026

Relocation assistance

Not verified

Childcare support

Offered From the posting source checked Jun 20, 2026

Learning budget

Not verified

Verification

Source-linked checked Jun 7, 2026

Salary

Not verified

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

Was this benefit information wrong? Tell us.

Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Verification Engineer Tel Aviv-Yafo, Tel Aviv, ISR Annapurna Labs, is the team behind AWS Graviton- the industry's most advanced ARM-based server SoC. We operate like a start-up with the scale of the world's largest cloud provider. We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification at Annapurna Labs isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey: • It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written • It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack • It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality • It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development What sets us apart: • Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips • Cutting-edge methodologies drive every stage of our verification process • Relentless innovation - we don't settle; we actively seek new approaches that raise the bar on silicon quality • We do classic functional verification(SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure

Read the full description at www.amazon.jobs. FewerJobs shows a preview and links to the original posting.