Verification Engineer - Cisco Silicon One

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

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Childcare support

Not verified

Learning budget

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Verification

Not verified checked Jun 13, 2026

Salary

Not verified

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Verification Engineer - Cisco Silicon One Caesarea, Israel Meet the Team Join the Cisco Silicon One Front-End Design Verification team, responsible for validating the most advanced networking silicon in the world. Our team ensures functional correctness, quality, and reliability across the entire design flow. We combine state-of-the-art methodologies with a collaborative, startup-like culture, while being backed by the stability and resources of Cisco. Your Impact · Develop advanced verification environments using SystemVerilog and UVM · Write, run, and debug testbenches to ensure complete functional coverage · Drive pre-silicon and in-lab debug activities to resolve complex issues · Collaborate with RTL, architecture, and physical design teams to achieve design closure · Support methodology development, scripting, and automation to enhance productivity · Contribute to the success of Cisco Silicon One™, powering the next generation of Internet infrastructure Minimum Qualifications · 6+ years of experience in digital logic design verification · Advanced knowledge of SystemVerilog and UVM · Strong debug skills both pre-silicon and in-lab Preferred Qualifications · Scripting skills (Python, Perl, TCL, or shell) · Experience with system-level integration (AMBA, PCIe, SPI, I2C, JTAG, CPU) · Basic software knowledge (driver-level) · Basic design knowledge and familiarity with CDC concepts Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility,

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