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GDB/ZI - Integration Platform Frontend Engineer (M/F/D)
BASF - Country / Location IndiaIndexed from Successfactors Benefit evidence checked Jun 7, 2026posted 65 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 8 wksource Inferred from posting Verified non-birth-parent leave: 8 wk Salary not disclosed Inferred from posting 401(k) reportedGDB/ZI - Integration Platform Frontend Engineer (M/F/D) Country / Location India Objectives Describe your Product mission here (2 - 3 sentences only) Join our “Data Foundation” team and work on the cutting-edge “Integration” product that leverages innovative technologies to seamlessly connect applications and facilitate data exchange. The Integration Platform is a versatile framework for building and executing integration scenarios-serving both internal and external needs. With the platform and its underlying technologies, you'll have access to advanced tools and processes designed to connect to any type of data, in any format you require. As part of our mission, you'll help implement Enterprise Integration Concept capabilities across Data Integration, Thing Integration, Process Integration, and User Integration. If you're passionate about driving digital transformation and want to make a real impact in Hyderabad, this is your opportunity to be at the forefront of integration technology. Describe the objectives of the role here (2 - 3 sentences only) Be part of building the future of integration platform in Hyderabad! As an Integration Platform Engineer, you will play a key role in shaping a self-service, governed, and highly visible integration lifecycle for APIs, events, and workflows. Your expertise will help design and develop essential backend services that drive orchestration, governance, discovery, and automation-leveraging the power of Kubernetes. Join us to create robust solutions that accelerate digital transformation and make a real impact on g
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GDB/ZI - Integration Platform Engineer (M/F/D)
BASF - Country / Location IndiaIndexed from Successfactors Benefit evidence checked Jun 7, 2026posted 65 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 8 wksource Inferred from posting Verified non-birth-parent leave: 8 wk Salary not disclosed Inferred from posting 401(k) reportedGDB/ZI - Integration Platform Engineer (M/F/D) Country / Location India Objectives Describe your Product mission here (2 - 3 sentences only) Join our “Data Foundation” team and work on the cutting-edge “Integration” product that leverages innovative technologies to seamlessly connect applications and facilitate data exchange. The Integration Platform is a versatile framework for building and executing integration scenarios-serving both internal and external needs. With the platform and its underlying technologies, you'll have access to advanced tools and processes designed to connect to any type of data, in any format you require. As part of our mission, you'll help implement Enterprise Integration Concept capabilities across Data Integration, Thing Integration, Process Integration, and User Integration. If you're passionate about driving digital transformation and want to make a real impact in Hyderabad, this is your opportunity to be at the forefront of integration technology. Describe the objectives of the role here (2 - 3 sentences only) Be part of building the future of integration platform in Hyderabad! As an Integration Platform Engineer, you will play a key role in shaping a self-service, governed, and highly visible integration lifecycle for APIs, events, and workflows. Your expertise will help design and develop essential backend services that drive orchestration, governance, discovery, and automation-leveraging the power of Kubernetes. Join us to create robust solutions that accelerate digital transformation and make a real impact on g
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Finance Controller
Motorola Solutions, Inc. - Tel Aviv, Israel (ZIL87)Indexed from Workday Benefit evidence checked May 7, 2026posted 65 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Finance From the posting source - Mid From the posting source Resolvable source Verified parental leave: 13 wksource Resolvable source Verified non-birth-parent leave: 13 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedFinance Controller Tel Aviv, Israel (ZIL87) posted: Posted Today
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Staff DFT Engineer
Analog Devices - India, Bangalore, RMZIndexed from Workday Benefit evidence checked May 7, 2026posted 81 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedStaff DFT Engineer India, Bangalore, RMZ posted: Posted 16 Days Ago
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2026 Campus - SoC DFT Engineer
NXP Semiconductors - Tianjin (Teda)Indexed from Workday Benefit evidence checked May 7, 2026posted 96 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported2026 Campus - SoC DFT Engineer Tianjin (Teda) posted: Posted 30+ Days Ago
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Senior SOC DFT Engineer, Google Cloud
Google - Tel Aviv, Israel; +1 moreIndexed from Google Custom Benefit evidence checked May 7, 2026posted 74 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior SOC DFT Engineer, Google Cloud Tel Aviv, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will play a crucial role in Design for Testing (DFT) Architecture and DFT design, and support devices of extreme complexity to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality matrix throughout the project life-cycle, and providing sign-off DFT to tapeout. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers. Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale ASICs. Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST),
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Senior DFT Engineer
Analog Devices - CLOSED-India, Bangalore, Aveda MetaIndexed from Workday Benefit evidence checked May 7, 2026posted 96 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior DFT Engineer CLOSED-India, Bangalore, Aveda Meta posted: Posted 30+ Days Ago
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Sr. DFT Engineer
NXP Semiconductors - PuneIndexed from Workday Benefit evidence checked May 7, 2026posted 96 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSr. DFT Engineer Pune posted: Posted 30+ Days Ago
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Junior DevOps Engineer - zastępstwo
Rockwell Automation - Katowice, PolandIndexed from Workday Benefit evidence checked May 7, 2026posted 66 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Entry From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedJunior DevOps Engineer - zastępstwo Katowice, Poland posted: Posted Yesterday
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Junior SoC DFT Engineer, Google Cloud
Google - Haifa, Israel; +1 moreIndexed from Google Custom Benefit evidence checked May 7, 2026posted 67 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Entry From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedJunior SoC DFT Engineer, Google Cloud Haifa, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a System on a Chip (SoC) Design for Testing (DFT) Engineer, you will be responsible for defining, implementing and deploying advanced DFT methodologies for highly digital or mixed-signal chips or IPs. You will define silicon test strategies, DFT architecture, and create DFT specifications for a CPU. You will design, insert and verify the DFT logic.You will prepare for post silicon and co-work/debug with test engineers. You will be responsible for reducing test cost, increasing production quality and enhancing yield. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Develop DFT strategy and architecture (e.g., hierarchical DFT, Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG). Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality.
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Senior DFT Engineer
Amazon - Tel Aviv-Yafo, Tel Aviv, ISRIndexed from Amazon Custom Benefit evidence checked Jun 7, 2026posted 104 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Inferred from posting Verified non-birth-parent leave: 6 wk Salary not disclosed Inferred from posting Adoption assistance Inferred from posting Childcare support Inferred from posting Fertility benefits Inferred from posting Mental health support Equity Inferred from posting 401(k) reportedSenior DFT Engineer Tel Aviv-Yafo, Tel Aviv, ISR Annapurna Labs is a fabless semiconductor company founded by industry veterans and operates as part of Amazon Web Services (AWS). We develop leading-edge semiconductor products that power Amazon's cloud infrastructure. As a startup-like organization within AWS, we create technologies that drive the world's largest cloud provider. Our engineers work with cutting-edge technologies to innovate and shape the future of cloud computing. At Annapurna Labs, you'll experience a fast-paced environment that offers continuous learning opportunities and the chance to develop next-generation platforms. Why Join Us At Annapurna Labs, you'll be part of a dynamic team that's redefining semiconductor technology. We offer an environment that values innovation, collaboration, and continuous learning. Your work will directly impact millions of customers worldwide, driving the future of cloud computing. Watch these videos to learn more about Annapurna Labs. AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0 Reducing design for test (DFT) effort with Tessent Streaming Scan Network (SSN) - Dan Trock, Amazon https://www.youtube.com/watch?v=CYpqna1ac-4 Key job responsibilities In this highly-visible role you will assume responsibility over a full range of DFT in an extremely challenging project, leading a talented team of engineers, working closely with frontend and backend teams. You will participate in architecture and design reviews, create design solutions for testability, debug ability, reliability and yield improvement. You will provide design constraints for implementation and sign-off. You will build work plans, drive and track their execution. You will be closely involved in silicon
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Technical Director, DFT
NXP Semiconductors - BangaloreIndexed from Workday Benefit evidence checked May 7, 2026posted 66 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedTechnical Director, DFT Bangalore posted: Posted Yesterday
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Senior DfT Engineer
NXP Semiconductors - CaenIndexed from Workday Benefit evidence checked May 7, 2026posted 96 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior DfT Engineer Caen posted: Posted 30+ Days Ago
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Principal DFT Engineer
NXP Semiconductors - PuneIndexed from Workday Benefit evidence checked May 7, 2026posted 96 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedPrincipal DFT Engineer Pune posted: Posted 30+ Days Ago
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Senior Silicon DFT Engineer, Google Cloud
Google - Tel Aviv, Israel; +1 moreIndexed from Google Custom Benefit evidence checked May 7, 2026posted 67 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Silicon DFT Engineer, Google Cloud Tel Aviv, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will play a crucial role in Design for Testing (DFT) Architecture and DFT design, and support devices of extreme complexity to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality matrix throughout the project life-cycle, and providing sign-off DFT to tapeout. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers. Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale ASICs. Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST),
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Senior DFT Lead
Google - Tel Aviv, Israel; +1 moreIndexed from Google Custom Benefit evidence checked May 7, 2026posted 73 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior DFT Lead Tel Aviv, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout. In this role, you will work to shape the future of an Edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical. You will be part of a team that pushes boundaries, developing autonomous solutions that define the next-generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers,
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Senior Principal DFT Engineer
NXP Semiconductors - PuneIndexed from Workday Benefit evidence checked May 7, 2026posted 96 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Principal DFT Engineer Pune posted: Posted 30+ Days Ago
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Junior Silicon DFT Engineer, Google Cloud
Google - Tel Aviv, Israel; +1 moreIndexed from Google Custom Benefit evidence checked May 7, 2026posted 69 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Entry From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedJunior Silicon DFT Engineer, Google Cloud Tel Aviv, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Design for Test (DFT) Engineer, you will be responsible for defining, implementing, and deploying advanced DFT methodologies for digital or mixed-signal chips. You will define silicon test strategies, DFT architecture, and create DFT specifications for next generation SoCs. You will design and verify the DFT logic and prepare for post silicon and co-work/debug with test engineers. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Develop DFT strategy and architecture (e.g., Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG),
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Senior Silicon DFT Lead
Google - Haifa, Israel; +1 moreIndexed from Google Custom Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Other - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Silicon DFT Lead Haifa, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC). Develop DFT strategy
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Container as a Service Engineer - OpenShift
Truist Financial Corporation - 4 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 66 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 10 wksource Resolvable source Verified non-birth-parent leave: 10 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedContainer as a Service Engineer - OpenShift 4 Locations posted: Posted Yesterday
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Systems Integration and Test Engineer - TETRA/Dimetra
Motorola Solutions, Inc. - Krakow, PolandIndexed from Workday Benefit evidence checked May 7, 2026posted 66 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 13 wksource Resolvable source Verified non-birth-parent leave: 13 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSystems Integration and Test Engineer - TETRA/Dimetra Krakow, Poland posted: Posted Yesterday
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Mid-Level Platform Engineer
Motorola Solutions, Inc. - Uxbridge, UK (ZUK131)Indexed from Workday Benefit evidence checked May 7, 2026posted 75 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 13 wksource Resolvable source Verified non-birth-parent leave: 13 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedMid-Level Platform Engineer Uxbridge, UK (ZUK131) posted: Posted 10 Days Ago
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Junior Back End Engineer
Motorola Solutions, Inc. - Edinburgh, UK (ZUK129)Indexed from Workday Benefit evidence checked May 7, 2026posted 75 days agoWhy we showed this
Title: semantic matchRole: semantic match+1
Unspecified Data From the posting source - Entry From the posting source Resolvable source Verified parental leave: 13 wksource Resolvable source Verified non-birth-parent leave: 13 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedJunior Back End Engineer Edinburgh, UK (ZUK129) posted: Posted 10 Days Ago
- posted 96 days ago
Why we showed this
Title: semantic matchRole: semantic match+1
Unspecified Other - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedNetwork SME Noida posted: Posted 30+ Days Ago
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