Senior DFT Engineer

Benefits

Parental leave

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Non-birth-parent leave

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Mental health support

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Market context

Median wage (BLS OEWS)

$111,944 national median

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

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Weekend work

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Application

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Deadline

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About this role

Senior DFT Engineer Tel Aviv-Yafo, Tel Aviv, ISR Annapurna Labs is a fabless semiconductor company founded by industry veterans and operates as part of Amazon Web Services (AWS). We develop leading-edge semiconductor products that power Amazon's cloud infrastructure. As a startup-like organization within AWS, we create technologies that drive the world's largest cloud provider. Our engineers work with cutting-edge technologies to innovate and shape the future of cloud computing. At Annapurna Labs, you'll experience a fast-paced environment that offers continuous learning opportunities and the chance to develop next-generation platforms. Why Join Us At Annapurna Labs, you'll be part of a dynamic team that's redefining semiconductor technology. We offer an environment that values innovation, collaboration, and continuous learning. Your work will directly impact millions of customers worldwide, driving the future of cloud computing. Watch these videos to learn more about Annapurna Labs. AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0 Reducing design for test (DFT) effort with Tessent Streaming Scan Network (SSN) - Dan Trock, Amazon https://www.youtube.com/watch?v=CYpqna1ac-4 Key job responsibilities In this highly-visible role you will assume responsibility over a full range of DFT in an extremely challenging project, leading a talented team of engineers, working closely with frontend and backend teams. You will participate in architecture and design reviews, create design solutions for testability, debug ability, reliability and yield improvement. You will provide design constraints for implementation and sign-off. You will build work plans, drive and track their execution. You will be closely involved in silicon

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