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Substrate jobs

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  • Substrate Technologist

    Apple - San Francisco Bay Area, United States of America
    Indexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in posting
    posted 80 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Engineering From the posting source - Mid From the posting source $172K-$302K From the posting source Equity Inferred from posting 401(k) reported

    Substrate Technologist San Francisco Bay Area, United States of America At Apple, we believe new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Our Hardware Technology Packaging team invents, designs, develops, and integrates electronic packaging solutions for Apple's internal and custom external components of hardware for its consumer electronic products such as iPhone, iPad, Mac, Apple Watch, Apple TV, etc. In this highly visible role, you will own and drive sophisticated package selection, new-generation product package structure and configuration optimization. You will be responsible for Apple Package substrate including design, technology, manufacturing, and reliability, and future roadmap; and work with a cross-functional team to achieve the best package performance. - Lead RFSIP package substrate development, pathfinding technology, and roadmap definition. - Work with substrate manufacturing industry, foundry, and OSAT to bring package substrate solution from concept to HVM. - Work across a variety of cross-functional groups directly and involve themselves in engineering and product development. - Drive industry with sophisticated package solutions, new material development, and specs. - 5% International travel. Work with industry partners to develop new substrate technologies from concept to HVM for Apple packaging roadmap. Work with cross-functional groups to define & optimize new package substrate architectures based on performance, technical risk, cost, and availability etc. Problem solving of technical issues during the full product development cycle. Minimum Qualifications: BS and 10+ years of relevant industry experience. Preferred Qualifications: MS or Ph.D. and 5+ years of relevant industry experience. Proven fundamentals

  • Packaging Substrate Engineer

    Apple - San Francisco Bay Area, United States of America
    Indexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in posting
    posted 125 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Engineering From the posting source - Mid From the posting source $127K-$221K From the posting source Equity Inferred from posting 401(k) reported

    Packaging Substrate Engineer San Francisco Bay Area, United States of America Our Hardware Technology Packaging team invents, designs, develops, and integrates electronic packaging solutions for Apple's internal and custom external components of hardware for its consumer electronic products such as iPhone, iPad, Mac, Apple Watch, Apple TV etc. In this highly visible role, you will own and drive sophisticated package selection, new-generation package structure and configuration optimization. You will be responsible for Apple package substrate including design, technology, manufacturing, and reliability, and future roadmap; and work with cross-functional teams to achieve the best package performance. Lead SoC package substrate technology development, pathfinding, and roadmap definition. Work with substrate manufacturing industry, foundry, and OSAT to bring package substrate solution from concept to HVM. Drive industry with sophisticated package solutions, new architecture, material and process development, and spec definitions. 5% International travel Work with industry partners to develop new substrate technologies from concept to HVM for Apple packaging roadmap. Work with cross-functional groups to define & optimize new package substrate architectures based on performance, technical risk, cost, and availability etc. Problem solving of technical issues during the full product development cycle. Minimum Qualifications: Minimum requirement of a bachelors degree Preferred Qualifications: MS and or Ph.D. and 3+ years of relevant industry experience. In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. Hands-on experience in substrate manufacturing and technology development: Cu plating, lithography, dielectric material, via formation, solder resist, surface finish etc. Familiarity with package assembly and integration process preferred. Experience

  • Substrate Supplier Enablement Engineer

    Intel - US, Arizona, Phoenix
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 104 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Substrate Supplier Enablement Engineer US, Arizona, Phoenix posted: Posted 30+ Days Ago

  • Packaging Engineer (Substrate Design and Layout, Only open for fresh graduate)

    SanDisk - Taichung, Taichung City, Taiwan
    Indexed from Smartrecruiters
    posted 74 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +1
    Unspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity

    Packaging Engineer (Substrate Design and Layout, Only open for fresh graduate) Taichung, Taichung City, Taiwan Company Description: Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description: Participate in the development of package design and advanced substrate layout for products. Learn and become proficient in EDA layout tools (e.g., Cadence SIP/Allegro) to perform package and substrate drawing, design modifications, and related engineering tasks. Perform basic routing planning, layer stack‑up configuration, and design‑for‑manufacturability (DFM) checks based on established design rules and manufacturing requirements. Collaborate with cross‑functional engineering teams-including hardware, manufacturing, and packaging-to support

  • Software Engineer (L3) Data Substrate

    Twilio - Remote - US
    Indexed from Eightfold Benefit evidence checked Jun 13, 2026
    posted 72 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Remote From the posting source Engineering From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Software Engineer (L3) Data Substrate Remote - US

  • Packaging Engineer (Substrate Design and Layout)

    SanDisk - Taichung, Taichung City, Taiwan
    Indexed from Smartrecruiters
    posted 74 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +1
    Unspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity

    Packaging Engineer (Substrate Design and Layout) Taichung, Taichung City, Taiwan Company Description: Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description: Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD controllers, NAND BGA, uSD, SD, and USB products. Support the development and integration of advanced packaging technologies, with a focus on standalone ASIC, MCM FCBGA, and 2.5D. Emphasis is placed on interposer/substrate/board co-design, design rule definition, and cross-functional collaboration. Conduct substrate layout feasibility studies,

  • Senior Software Engineer, Substrate

    Palantir Technologies - Washington, D.C.
    Indexed from Lever Comp disclosed in posting
    posted 380 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Engineering From the posting source - Senior From the posting source $145K-$200K From the posting source Inferred from posting Surrogacy assistance Inferred from posting Fertility benefits Equity

    Senior Software Engineer, Substrate Washington, D.C. A World-Changing Company Palantir builds the world's leading software for data-driven decisions and operations. By bringing the right data to the people who need it, our platforms empower our partners to develop lifesaving drugs, forecast supply chain disruptions, locate missing children, and more. The Role Substrate is the team responsible for Palantir's core production infrastructure - 100s of K8s clusters - from on-prem to the major cloud hyperscalers, whether they are internet-connected or air-gapped, small hardware footprint or large. As a Senior Software Engineer on Substrate, you will design and build Palantir's managed Kubernetes product offerings across all these environments. You and your team will be responsible for bootstrapping and operating the entire fleet of K8s clusters with zero manual steps by building industry leading tooling and contributing to core CNCF components. You will also be responsible for ensuring scale, stability and security across a matrix of compliance regimes and hosting infrastructure types. Your team culture emphasizes engineering rigor and operational excellence at scale. This means issues in production should be pre-empted and deeply root-caused, and investments in automation and self-healing systems are key. If you're excited about infrastructure at scale and working with Kubernetes, this is the right role for you. The Role Substrate is the team responsible for Palantir's core production infrastructure - 100s of K8s clusters - from on-prem to the major cloud hyperscalers, whether they are internet-connected or air-gapped, small hardware footprint or large. As a Senior Software Engineer on

  • Senior Staff Engineer Substrate Designer

    Infineon Technologies - Melaka (Malaysia)
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 72 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Data From the posting source - Senior From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Senior Staff Engineer Substrate Designer Melaka (Malaysia)

  • Substrate Engineer

    Broadcom - Singapore-Yishun
    Indexed from Workday
    posted 104 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity

    Substrate Engineer Singapore-Yishun posted: Posted 30+ Days Ago

  • Mechanical Engineer

    Substrate - San Francisco | OnSite
    Indexed from Ashby
    posted 74 days ago

    Why we showed this

    Employer: "substrate"Employer: semantic match
    +1
    Onsite - 5d office From the posting source Engineering From the posting source - Mid From the posting source Salary not disclosed

    Mechanical Engineer San Francisco | OnSite

  • Substrate/Package Layout Engineer

    Broadcom - USA-California-San Jose-1320 Ridder Park Drive
    Indexed from Workday
    posted 104 days ago

    Why we showed this

    Title: semantic matchTitle: "substrate"
    +1
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity

    Substrate/Package Layout Engineer USA-California-San Jose-1320 Ridder Park Drive posted: Posted 30+ Days Ago

  • Senior Substrate Program Managers

    Intel - 2 Locations
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 104 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Other - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior Substrate Program Managers 2 Locations posted: Posted 30+ Days Ago

  • AR Glass Substrate Expert – Glass Melting & High Index Glass Process Development

    Applied Materials - Santa Clara,CA
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 104 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +1
    Unspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    AR Glass Substrate Expert – Glass Melting & High Index Glass Process Development Santa Clara,CA posted: Posted 30+ Days Ago

  • Process Engineer

    Substrate - San Francisco | OnSite
    Indexed from Ashby
    posted 74 days ago

    Why we showed this

    Employer: "substrate"Employer: semantic match
    +1
    Onsite - 5d office From the posting source Engineering From the posting source - Mid From the posting source Salary not disclosed

    Process Engineer San Francisco | OnSite

  • Research Scientist, AI

    Substrate - San Francisco | OnSite
    Indexed from Ashby
    posted 74 days ago

    Why we showed this

    Employer: "substrate"Employer: semantic match
    +1
    Onsite - 5d office From the posting source Data From the posting source - Mid From the posting source Salary not disclosed

    Research Scientist, AI San Francisco | OnSite

  • Technical Program Manager

    Substrate - San Francisco | OnSite
    Indexed from Ashby
    posted 74 days ago

    Why we showed this

    Employer: "substrate"Employer: semantic match
    +1
    Onsite - 5d office From the posting source Operations From the posting source - Mid From the posting source Salary not disclosed

    Technical Program Manager San Francisco | OnSite

  • Senior Process Engineer

    Substrate - San Francisco | OnSite
    Indexed from Ashby
    posted 74 days ago

    Why we showed this

    Employer: "substrate"Employer: semantic match
    +1
    Onsite - 5d office From the posting source Engineering From the posting source - Senior From the posting source Salary not disclosed

    Senior Process Engineer San Francisco | OnSite

  • Electromechanical Engineer

    Substrate - San Francisco | OnSite
    Indexed from Ashby
    posted 74 days ago

    Why we showed this

    Employer: "substrate"Employer: semantic match
    +1
    Onsite - 5d office From the posting source Engineering From the posting source - Mid From the posting source Salary not disclosed

    Electromechanical Engineer San Francisco | OnSite

  • Standard Cell Design Lead

    Substrate - San Francisco | OnSite
    Indexed from Ashby
    posted 74 days ago

    Why we showed this

    Employer: "substrate"Employer: semantic match
    +1
    Onsite - 5d office From the posting source Design From the posting source - Senior From the posting source Salary not disclosed

    Standard Cell Design Lead San Francisco | OnSite

  • APTD Substrates Factory Engineer

    Intel - US, Arizona, Phoenix
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 95 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    APTD Substrates Factory Engineer US, Arizona, Phoenix posted: Posted 22 Days Ago

  • Senior Manager Substrates (Supplier Quality)

    Infineon Technologies - Bangkok (Thailand)
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 72 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Other - Senior From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Senior Manager Substrates (Supplier Quality) Bangkok (Thailand)

  • Advanced Packaging Technology Development Substrates Module Engineer On-Shift (Nightshift)

    Intel - US, Arizona, Phoenix
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 81 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Advanced Packaging Technology Development Substrates Module Engineer On-Shift (Nightshift) US, Arizona, Phoenix posted: Posted 8 Days Ago

  • Sr. Substrates Development and Ramp Engineer

    Intel - Taiwan, Taipei
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 104 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +2
    Unspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Sr. Substrates Development and Ramp Engineer Taiwan, Taipei posted: Posted 30+ Days Ago

  • Senior Systems Engineer – Laser Integration & Applications (Advanced Substrates)

    Applied Materials - 2 Locations
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 75 days ago

    Why we showed this

    Description: "substrate"Title: "substrate"
    +1
    Unspecified Engineering From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior Systems Engineer – Laser Integration & Applications (Advanced Substrates) 2 Locations posted: Posted 2 Days Ago

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