Stmicroelectronics jobs

ALTERNANCE - Chargé de communication - F/H Rousset, France

CDI - Technicien de maintenance EWS (équipe de nuit fin de semaine) F/H​ Rousset, France

Manufacturing Planning Senior Engineer Hsinchu City, Taiwan

HR Partner (Maternity Cover) Agrate Brianza, Italy

Alternant(e) Qualité - Audit QMS Crolles, France

Senior Engineer - Project Leader (NPI) Calamba, Philippines

Alternance - Spécialiste Commercial Marketing - F/H Tours, France

Senior Manager, Global Business Reporting & Intelligence Singapore

ALTERNANCE - Technicien Maintenance WET - F/H Rousset, France

Intern Automation Engineer - Project Support Singapore, Singapore

Assistant Maintenance Engineer ( 12hrs Rotating Shift) Singapore

Chip Level STA Engineer Armenia Meet the Team Join Cisco's ASIC Physical Design Team, where we ensure the highest quality in full-chip timing closure and circuit performance to guarantee a successful tape-out. We bridge the gap between design and reality by collaborating across block implementation, flow, SDC, EMIR, and IP/tool vendor teams to drive silicon excellence. As a tight-knit group of highly skilled engineers, we foster a collaborative environment where innovation meets precision. Together, we are building the foundation for the future of connectivity, driving advancements in power, performance, and reliability with every project. This is your opportunity to shape the technology that connects the world while working alongside a team that values mentorship and celebrates technical success. Your Impact Drive Cisco's silicon innovation by ensuring high-performance timing closure and rigorous sign-off for our next-generation chips to guarantee a successful tape-out. Analyze full-chip timing and design rule violations to identify root causes and implement effective solutions that maintain design integrity. Develop robust timing closure methodologies for block and top-level designs to streamline development and improve efficiency. Collaborate closely with implementation teams to ensure smooth ECO execution and seamless design handoffs. Evaluate complex clocking structures and timing constraints to guarantee that all silicon solutions meet stringent performance targets. Minimum qualifications Bachelor's or Master's degree in Electrical Engineering or Computer Science. Minimum of 3 years of hands-on experience in ASIC design and verification. Proven experience working with deep submicron CMOS technologies. Comprehensive knowledge of the full design cycle from RTL to GDSII.

ALTERNANCE - Ingénieur Maintenance Métrologie - H/F Rousset, France

CDI - MFG – Ingénieur.e prototypes en micro-électronique Crolles, France

Sr Staff Digital Verification Engineer Shanghai, , China Company Description: Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what's next in electronics and the world. Job Description: -Understanding the expected functionality of designs. -Designing and developing verification environment -Improve the verification architecture and flow -Running RTL and gate-level simulations/regression. -Code/functional coverage development, analysis and closure. Qualifications: -MS in CS/ME. -Minimum of 8 years' experience. -Candidate should be familiar with as System Verilog, UVM verification. -Candidate should be familiar with

NPI EOL Senior Process Engineer Calamba, Philippines

Hardware Integration Engineer Austin, TX, Austin, Texas, United States About Base Base is America's next-generation power company. We're rebuilding the foundation of modern civilization-electricity-by deploying a vast network of distributed batteries that is transforming today's fragile, centralized grid into a resilient and abundant system. We are engineers, operators, and creatives solving some of the most complex, interdisciplinary challenges of our time. About the Role We are looking for a Hardware Integration Engineer to help design and integrate the next generation of Base Power's residential battery storage, inverter, and microgrid interconnect device (MID) systems. This role requires strong electrical engineering fundamentals and hands-on experience with complex energy storage hardware. You'll play a critical role in building safe, reliable, and scalable hardware systems that power homes and communities. What You'll Do - Design and integrate battery management systems (BMS), inverters, and MID hardware for residential energy applications. - Develop and maintain system architecture and electrical schematics for multi-component energy systems. - Conduct testing, validation, and troubleshooting of integrated hardware systems. - Partner with software teams to ensure seamless hardware/software integration and control algorithm development. - Support regulatory compliance and product certification processes to meet industry standards. What You'll Bring - BS/MS in Electrical Engineering (or related field) with 3+ years of hardware development experience, ideally in energy storage or power systems. - Core Technical Knowledge : - Electrical engineering fundamentals: circuit analysis, analog/digital electronics, high-voltage design. - Power electronics: DC-DC/DC-AC converters, inverters, switching power supplies, grid-tie systems. - Battery systems: Li-ion/LiFePO4 technologies,

Account Executive Manager Santa Clara, United States

CDI - Parametric Test Engineer - H/F Rousset, France

CIFRE - Injection de fautes sur les algorithmes de cryptographie post‑quantique - H/F Rousset, France

MDRF Central Operation Engineer Intern Singapore, Singapore

ALTERNANCE – Ingénieur Laboratoire Analyse de Défaillance - F/H France

Sr Electrical Engineer – Design Verification - FPGA/ASIC (Onsite) US-IA-CEDAR RAPIDS-121 ~ 350 Collins Rd NE ~ BLDG 121 posted: Posted 30+ Days Ago

Principal Electronics Engineer - Subsystems United States-California-San Diego