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RF/Microelectronics Packaging Engineer

Viasat INC - Tempe, Arizona

Posted Apr 9, 2026

Benefits

Parental leave
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Non-birth-parent leave
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Family-building benefits
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  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
Not verified last checked Jun 13, 2026
Salary
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401(k) match
Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Schedule

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Weekend work
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Application

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Assessment
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Deadline
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Where they hire

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About this role

RF/Microelectronics Packaging Engineer Tempe, Arizona About us One team. Global challenges. Infinite opportunities. At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We're looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team. What you'll do The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also involves managing packaging efforts related to radio frequency communication devices. The products range from IC's, System In Packages, sub-assemblies, and modules. The packaging development process includes package definition, stack-up, substrate layout, bond diagram, drawings, predictive modeling combined with system testing, technical risk/cost assessment, materials and process characterization, compilation of formal documentation, collaborating with sub-contractors and internal assembly and reliability resources, and final release of product. The day-to-day Job responsibilities include but not limited to: Working closely with project development teams and product groups (RFIC, MMIC, Module) to develop the next generation/sophisticated/novel packaging solution for RF communication products Define packages and materials that meet product requirements for reliability, performance, manufacturability, and cost. Ensure all packaging work is completed for New Product and New Technology Introductions Develop and manage packaging documentation including SOWs, package drawings, and process flows Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers Ensure

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