Staff, RTL Engineer

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

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• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Salary

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type

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Weekend work

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Application

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Assessment

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Deadline

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Where they hire

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About this role

Staff, RTL Engineer United States; 新北市, New Taipei City, Taiwan Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent and help build the next generation of AI and CPU hardware. You'll drive microarchitecture and RTL development for cutting-edge digital IPs powering industry-leading AI/ML accelerators and CPUs, working across design, debug, test, and silicon bring-up. This is a unique opportunity to shape groundbreaking hardware from concept to production while collaborating with some of the industry's top engineers. This role is remote, based out of North America or Taiwan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - Experienced RTL and microarchitecture engineer with a strong background in complex ASIC, SoC, or chiplet development. - Hands-on experience with Verilog-based design, industry-standard simulation and synthesis tools, and complex digital subsystem integration. - Skilled at solving

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