Staff Analog Design Engineer (f/m/d)

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 7, 2026

Salary

Not verified

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

Was this benefit information wrong? Tell us.

Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Data From the posting source

Seniority

Mid From the posting source

Schedule

Shift type

Not verified

Weekend work

Not verified

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Staff Analog Design Engineer (f/m/d) Zurich, , Switzerland Company Description: Job Description: We are looking for a Staff Analog Design Engineer to join our team in Zürich, working on next-generation mixed-signal ICs for wireless power and power management (PMIC) applications. In this role, you will take end-to-end ownership of major analog IPs and contribute at both architecture and implementation level, from concept definition through mass production silicon. Key Responsibilities Lead the definition, design, and ownership of complex analog and mixed-signal IPs, such as: PMIC building blocks (LDOs, references, regulators, amplifiers) Wireless power-related analog IPs High-performance ADC/DAC interfaces and analog front-ends Contribute to system-level and architecture definition in close collaboration with digital, firmware, and system teams Perform transistor-level design, simulation, and optimization, including: PVT, corner, and Monte Carlo analysis Robustness and reliability considerations Ensure design robustness and manufacturability across process, voltage, and temperature variations Support and guide layout activities, including: Floorplanning of large analog IPs Matching, shielding, and parasitic-aware design Post-layout simulation and sign-off Play an active role in silicon bring-up, validation, debug, and characterization Contribute to and support test and qualification phases, working closely with test, product, and quality teams Drive design reviews, technical documentation, and cross-team alignment Contribute to best practices within the analog design team Qualifications: Qualifications PhD with 5+ years of industry experience or MSc with 8+ years of industry experience in analog/mixed-signal IC design Strong experience in transistor-level CMOS analog design Solid understanding of analog design fundamentals (noise, stability, matching, reliability) Proven experience owning designs from

Read the full description at jobs.smartrecruiters.com. FewerJobs shows a preview and links to the original posting.