Senior Staff Engineer (Design)

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified checked Jun 7, 2026

Salary

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401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Data From the posting source

Seniority

Senior From the posting source

Schedule

Shift type

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Weekend work

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Application

Cover letter

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Assessment

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Deadline

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Where they hire

State eligibility is not yet verified.

About this role

Senior Staff Engineer (Design) Bayan Lepas, , Malaysia Company Description: Job Description: Job Description Lead cross-functional teams across Design, Systems, Validation, Product/Test Engineering, Firmware, Supply Chain, Procurement, and Quality to ensure seamless program execution in NPI projects. Lead COGS reduction programs from impact assessment through qualification, PCN, safelaunch, and production ramp - quantifying savings, evaluating ROI, and assessing the business impact of schedule slips and risk scenarios. Drive capacity expansion initiatives across global manufacturing sites, aligning engineering, operations, and supply chain to support production scalability. Build and manage detailed schedules for NPI, COGS and capacity programs; track progress, remove roadblocks, and implement data‑driven mitigation plans. Manage Engineering Build Request prioritization, conducting bi‑weekly reviews with PMO and Business Operations leadership to ensure alignment with organizational priorities. Act as a liaison between the product group, operations/supply chain teams, and key OSAT interface teams to ensure alignment, clarity, and seamless execution across all stages of the program. Drive sample readiness and ramp readiness, ensuring cross‑functional teams maintain schedules that support committed customer delivery timelines. Coordinate and conduct Project Gate reviews, ensuring cross‑functional readiness, milestone alignment, and clear communication of risks and dependencies. Oversee wafer fab, assembly, and test operations to ensure timeline adherence, cost efficiency, and quality standards across programs. Provide structured leadership updates on program status, risks, and mitigation plans, maintaining accurate schedules and qualification documentation. Qualifications: Bachelor's or Master's degree in Electrical Engineering, with 8+ years of experience in semiconductor packaging technology and product lifecycle management. Strong understanding of semiconductor packaging

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