Design Verification, Forward Deployed Engineering
OpenAI - San Francisco, California, United States, London, UK
Posted May 8, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified
- Salary
- Not verified
Was this benefit information wrong? Tell us.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Design Verification, Forward Deployed Engineering San Francisco, California, United States, London, UK About the Team OpenAI's Forward Deployed Engineering team partners with leading semiconductor companies to deploy production-grade AI systems across the entire chip design lifecycle: design, verification, and physical design. We operate at the intersection of customer delivery and core platform development, embedding deeply with customers to translate frontier model capabilities into systems that materially reduce design cycles, improve verification quality, and accelerate innovation. Our work turns early, high-touch deployments into reusable solution patterns, evaluation practices, and technical playbooks that scale across the semiconductor ecosystem. About the Role We are seeking an experienced Design Verification Engineer to join our semiconductor-focused Forward Deployed Engineering team. This is an IC role that will begin with a strong emphasis on design verification expertise, evaluation curation, and technical leverage across deployments, with the expectation that the person will grow into a broader Forward Deployed Engineering role over time. In the near term, you will serve as a senior technical SME for verification workflows: helping FDEs, Product, and Research teams understand how DV work is done in practice, pressure-testing AI-assisted verification ideas against real engineering workflows, and raising the quality of our solutions through deep domain judgment. You will help the broader team build fluency in verification methodology, tooling, and trade-offs. Over time, we expect this role to expand beyond SME support into broader FDE ownership: partnering directly with customers, shaping deployment strategy, building and iterating production-grade AI systems, driving technical workstreams, and helping
Read the full description at jobs.ashbyhq.com. FewerJobs shows a source-linked preview and links to the original posting.
Apply link not verified; last-live date unavailable.
What verified means
Verified means a displayed claim has a recorded source field, a source URL when available, and a timestamp showing when FewerJobs checked or enriched the evidence.
Related jobs
-
Systems Engineer - (Execution) - Level 3/4
Northrop Grumman - United States-Alabama-Huntsville
-
Business Analyst (Top Secret cleared)
ICF International INC - Washington, DC
-
Engineering Project Specialist II (Full Time) - United State
Cisco - San Jose, California, US
-
Automation AI Ops Engineer
Cisco - 2 Locations