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Principal Engineer, Design Technology Co-optimization

Intel - 4 Locations

Posted Apr 5, 2026

Verified benefits

Parental leave
12 weeks source
Non-birth-parent leave
12 weeks
Verified
Yes last checked unknown
Salary
Not disclosed

Market context

Median wage (BLS OEWS)
$116,543 national median
Projected growth (BLS Employment Projections)
+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Where they hire

State eligibility is not yet verified.

About this role

Principal Engineer, Design Technology Co-optimization 4 Locations Principal Engineer, Design Technology Co-optimization /job/US-Oregon-Hillsboro/Principal-Engineer--Design-Technology-Co-optimization_JR0282605 4 Locations Posted 30+ Days Ago

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