Platform and Chassis ASIC Architect, Silicon

Benefits

Parental leave

18 weeks Source: https://blog.google/company-news/outreach-and-initiatives/diversity/international-womens-day-2022/. source Last checked May 7, 2026.

Non-birth-parent leave

18 weeks Source: https://blog.google/company-news/outreach-and-initiatives/diversity/international-womens-day-2022/. source Last checked May 7, 2026.

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Source-linked last checked May 7, 2026

Salary

Not verified

401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked May 7, 2026.

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Market context

Median wage (BLS OEWS)

$116,543 national median

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type

Not verified

Weekend work

Not verified

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Platform and Chassis ASIC Architect, Silicon Bengaluru, Karnataka, India Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will collaborate with software and hardware architects to explore Platform and Chassis trade-offs in Tensor SOC. You will develop and use analytical tools, simulation, emulation, and post-silicon measurements to perform holistic analysis of large complex ASIC designs. You will influence current and next generation SOCs in the product lineup, and play highly visible roles from ideation through mass production of our SOCs. As part of this work, you will participate in the development of exceptional technologies in fabric, memory, etc., and filing associated patents.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Impact and influence multiple stages of the SOC lifecycle, from ideation and concept through tapeout, bringup and mass production. Participate in architectural design and evaluation of future ASIC designs. Participate in creating architectural specifications for ASIC. Optimize top-level architectural definition to handle complex multi-IP flows. Communicate the analysis results in

Read the full description at www.google.com. FewerJobs shows a source-linked preview and links to the original posting.