CPU Performance Architect, Silicon

Benefits

Parental leave

18 weeks Verified - employer source source checked May 7, 2026

Non-birth-parent leave

18 weeks Verified - employer source source checked May 7, 2026

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Source-linked checked May 7, 2026

Salary

Not verified

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type

Not verified

Weekend work

Not verified

Application

Cover letter

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Assessment

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Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

CPU Performance Architect, Silicon New Taipei, Banqiao District, New Taipei City, Taiwan; +1 more As a CPU Performance Architect, you will be the key contributor to improve processor instruction set architecture, to develop innovative microarchitecture features, and deliver Google's advanced SoC products. You will collaborate cross-functionally with android applications and AI teams to conduct applications and benchmark performance analysis and to project their performance at various design phases. You will be guided by architects and work with engineers in Power, Thermal, Security, and Physical Design teams to determine the CPU subsystem configuration and features. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Develop and modify a performance model for performance analysis and microarchitecture study. Evaluate Advanced RISC Machine (ARM's) architecture features from both architecture and performance angles. Define and write CPU subsystem architecture specifications. Collaborate with Register-Transfer Level (RTL), design verification, and physical design teams to develop a high-performance and efficient CPU implementation. Manage performance correlation between the performance model and RTL implementation, including micro-benchmark development and pre-silicon and post-silicon performance bug triage. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science, with a focus on computer architecture, or equivalent practical experience. 4 years of experience in microprocessor

Read the full description at www.google.com. FewerJobs shows a preview and links to the original posting.