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Electrical Design Engineer

GE Vernova - SuZhou

Posted Apr 15, 2026

Verified benefits

Parental leave
10 weeks source
Non-birth-parent leave
10 weeks
Verified
Yes last checked 2026-05-07
Salary
Not disclosed
401(k) match
Not verified

Market context

Median wage (BLS OEWS)
$66,396 national median
Projected growth (BLS Employment Projections)
+3.5% - Average

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Where they hire

State eligibility is not yet verified.

About this role

Electrical Design Engineer SuZhou Job Description Summary Job Description Primary Responsibilities 主要职责 : Electrical design of control and monitoring for Medium / High voltage electrical primary equipment (66kV~550kV GIS, Circuit

Read the full description at gevernova.wd5.myworkdayjobs.com. FewerJobs shows a source-linked preview and links to the original posting.

Apply at gevernova.wd5.myworkdayjobs.com

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