Systems Validation Engineer, L10

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About this role

Systems Validation Engineer, L10 San Jose, CA, United States About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary You will be the L10 System Validation Engineer, defining what it means for the accelerator platform to be production-ready, build the infrastructure to prove it, and personally drive the most critical issues from detection through root cause to verified fix. Key Responsibilities - Author and own the L10 system debug guide, serving as the definitive reference for factory failure analysis and debug teams. - Own end-to-end escalation, debug, and resolution of L10 hardware failures across internal and field teams - Develop and own L10 system debug guide to be used for the factory by the failure analysis / debug team. - Own bring-up and integration across accelerator cards, interconnects (Retimers, C2C fabric), power (PSU, power integrity), and thermal domains. - Lead system-level debug with no guaranteed starting point: hardware, firmware (BMC, BIOS, CPLD), and software all in scope simultaneously. - Partner directly with CMs to validate incomplete systems, close coverage gaps, and gate production ramp. - Build ad-hoc

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