Senior Logic Design & Verification Engineer

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Not verified last checked Jun 13, 2026

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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About this role

Senior Logic Design & Verification Engineer Caesarea, Israel Meet the Team Join the Cisco Silicon One Front-End Design team, at the core of Cisco's silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation. We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what's possible. Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco's future routing portfolio and shaping the Internet for decades to come. Your Impact · Write and review micro-architecture specifications · Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements · Contribute to full chip integration, timing methodology, and analysis · Collaborate with verification engineers to resolve bugs and achieve coverage closure · Work with the physical design team to close timing and PnR issues · Support design methodology evolution and best practices · Perform debug, root-cause analysis, and post-silicon validation in the lab Minimum Qualifications · B.Sc./M.Sc. in Electrical Engineering from a top university · 5+ years of experience in a relevant field · RTL design experience · Familiarity with UVM and functional verification methodologies Preferred Qualifications · Experience with MATLAB simulations and bit-exact modeling environments · Familiarity with mixed-signal systems and environments · Knowledge and hands-on experience with Clock Domain Crossing (CDC) Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40

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