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Senior Design Engineer

Cisco - 2 Locations

Posted May 22, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
Not verified
Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
Not verified
Relocation assistance
Not verified
Childcare support
Not verified
Learning budget
Not verified
Verification
Not verified checked Jun 13, 2026
Salary
$131K-$182K From the posting source checked Jun 20, 2026
401(k) match
Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)
$116,543 U.S. median for this role
Projected growth (BLS Employment Projections)
+9.8% - Much faster than average

U.S. benchmark only; posted salary is not compared across countries or currencies.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Engineering From the posting source checked Jun 20, 2026
Seniority
Senior From the posting source checked Jun 20, 2026

Schedule

Shift type
Not verified
Weekend work
Not verified

Company

Equity
Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter
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Assessment
Not verified
Deadline
May 18, 2026 From the posting source checked Jun 20, 2026

Where they hire

State eligibility is not yet verified.

About this role

Senior Design Engineer 2 Locations The application window is expected to close on: 05/18/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team Join Cisco's Silicon Photonics group, where we combine deep expertise in analog, digital, and optical design to build the world's fastest networking solutions. We're a collaborative, innovative team passionate about pushing the limits of high-speed connectivity. Your Impact As a Hardware Design Engineer, you'll lead the design and development of next-generation 100G/200G/400G photonics ICs. From architecture to lab validation, you'll shape product direction, mentor engineers, and ensure Cisco stays at the forefront of optical networking innovation. Specific responsibilities include: Drive architecture, design, and verification of high-speed mixed-signal and photonics circuits. Define and document chip-level specifications and verification plans. Collaborate across optical, electrical, firmware, and manufacturing teams to deliver end-to-end solutions. Lead lab validation, debug, and yield improvement activities. Mentor and provide technical guidance to junior engineers. Minimum Qualifications Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience, or equivalent related work experience Master's or PhD in Electrical Engineering (or related field). Experience in analog/mixed-signal IC design for high-speed system. Lab validation and test experience with high-speed equipment. Experience writing code with Python or C for automation and/or analysis. Expertise with design tools (Cadence Virtuoso, Spectre, Calibre, etc.). Preferred Qualifications Deep expertise in photonics and high-speed datapath circuits (modulators,

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Apply link verified; last checked Aug 10, 2026.

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