ASIC Digital Design Engineer

Benefits

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Non-birth-parent leave

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Verification

Not verified last checked Jun 13, 2026

Salary

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Schedule

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Application

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Deadline

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About this role

ASIC Digital Design Engineer Armenia This is a hybrid role with four days per week at Cisco's Yerevan office. Meet the Team The Common Hardware Group delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. The team designs networking hardware for Enterprises, Service Providers, the Public Sector, and Non-Profit Organizations worldwide. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market, enabling customers to deploy best-of-breed silicon from TOR switches through web-scale data centers and across service provider and enterprise networks with a fully unified routing and switching portfolio. The team is composed of highly skilled engineers working on some of the most complex ASICs in the industry, fostering a collaborative and innovative environment. Joining this team means contributing to groundbreaking solutions that shape the future of networking silicon. Your Impact You will be a key member of the Silicon One development organization, collaborating closely with Front-end RTL and backend physical design teams to deeply understand chip architecture. Drive high-quality Design for Test (DFT) verification to ensure robust and reliable silicon solutions that meet Cisco's standards for performance and innovation. Take part in all aspects of digital design, from micro-architecture to RTL design and qualification. Integrate and verify sub-systems/SoCs, review and enhance RTL codes, and improve flows and methodologies to streamline IP/SoC development and integration. Work closely with the verification team for complex debug and resolution of verification failures, and interact with the physical design team to achieve better physical design

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