Designeur de circuits photoniques sur silicium/Senior Silicon Photonics Chip Designer
Ciena - 3 Locations
Posted Apr 5, 2026
Verified benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Verified
- No last checked 2026-05-07T13:50:00Z
- Salary
- Not disclosed
- 401(k) match
- Not verified
Market context
- Median wage (BLS OEWS)
- $66,396 national median
- Projected growth (BLS Employment Projections)
- +3.5% - Average
Matched to SOC 27-1024 - Design aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Where they hire
State eligibility is not yet verified.
About this role
Designeur de circuits photoniques sur silicium/Senior Silicon Photonics Chip Designer 3 Locations Designeur de circuits photoniques sur silicium/Senior Silicon Photonics Chip Designer /job/Quebec/Senior-Silicon-Photonics-Chip-Designer_R030533 3 Locations Posted 30+ Days Ago
Read the full description at ciena.wd5.myworkdayjobs.com. FewerJobs shows a source-linked preview and links to the original posting.
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