Digital Design Engineer - New College Grad
Rambus INC - San Jose, CA, US
Posted May 1, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified checked Jun 13, 2026
- Salary
- $98K-$183K not verified - source not recorded; timestamp not recorded
- 401(k) match
- Reported from DOL Form 5500 industry filing (not employer-specific)
Was this benefit information wrong? Tell us.
Market context
- U.S. role benchmark (BLS OEWS)
- $111,944 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +13.7% - Much faster than average
26% above the BLS role benchmark for data and ml aggregate.
Matched to SOC 15-1252 - Data and ML aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Digital Design Engineer - New College Grad San Jose, CA, US Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional MTS Digital Design Engineering to join our Memory Interface Chip team in San Jose. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Work with analog/digital design team for new product development Responsible for RTL coding, functional simulation, analog-block Verilog model, post-pr simulation Support bench test, support ATE test Support chip bringing-up, debugging, failure analysis, characterizations and product release efforts Qualifications Master degree or above in EE or related field Experience in the area listed below: Embedded SRAM/OTP/Efuse/MTP controller Design for test for digital block, analog block Communication bus such as I2C/I3C/SPI/AHB/APB Familiar to schematic editor Being Familiar to mixed signal design and backend is a plus Mass product experience is a plus Self-motivated and proactive Good communication skills and a strong team player About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider
Read the full description at careers-rambus.icims.com. FewerJobs shows a preview and links to the original posting.
Apply link verified; last checked Jun 13, 2026.
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