FPGA Design Engineer

Verified benefits

Parental leave

12 weeks source

Non-birth-parent leave

12 weeks

Verified

Yes last checked 2026-05-07

Salary

$92K-$124K

401(k) match

Listed

Market context

Median wage (BLS OEWS)

$116,543 national median

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

7% below the BLS national median for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Where they hire

State eligibility is not yet verified.

About this role

FPGA Design Engineer USA - Huntsville, AL FPGA Design Engineer /job/USA---Huntsville-AL/FPGA-Design-Engineer_JR2026503754-1 USA - Huntsville, AL Posted 2 Days Ago Onsite Job

Read the full description at boeing.wd1.myworkdayjobs.com. FewerJobs shows a source-linked preview and links to the original posting.