Principal Package Thermal & Mechanical Engineer
Astera Labs - San Jose, California, United States
Posted Mar 28, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
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- Salary
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- 401(k) match
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Market context
- Median wage (BLS OEWS)
- $116,543 national median
- Projected growth (BLS Employment Projections)
- +9.8% - Much faster than average
78% above the BLS national median for software engineering aggregate.
Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Principal Package Thermal & Mechanical Engineer San Jose, California, United States Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview As a Principal Package Thermal & Mechanical Engineer at Astera Labs, you will serve as a technical leader driving the development and modeling of advanced IC packaging solutions that enable next-generation AI and high-performance connectivity systems. In this highly visible role, you will define and execute thermal and mechanical modeling strategies across the chip-package-board system, influencing package architecture, material selection, and reliability design. You will partner closely with package design, SIPI, silicon, system, and manufacturing teams to ensure robust thermal/mechanical performance and first-pass success. You will also drive modeling methodologies, correlation strategies, and best-known methods (BKMs), while engaging directly with customers to translate complex simulation insights into actionable system-level solutions. Key Responsibilities - Thermal & Mechanical Modeling Leadership - Define and drive thermal and mechanical modeling strategies for advanced packages (FCBGA, FCCSP, multi-die, and chiplet-based architectures) - Perform detailed thermal simulations including steady-state and
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