Wireless RTL Design Engineer
Apple - Los Angeles Metro Area, United States of America
Posted Oct 23, 2025
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
- Not verified last checked Jun 13, 2026
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Wireless RTL Design Engineer Los Angeles Metro Area, United States of America Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this highly visible role, you will be at the center of a silicon design group with a critical impact on getting functional products to hundreds of millions of customers quickly. You will develop signal processing intensive design for wireless communication SoCs with diverse connectivity technologies. Will you join us and do the best work of your life here? Writing specifications and other documents based on MATLAB/C system model Microarchitecture definition IP integration, RTL logic design, and verification support Running tools to ensure lint-free and CDC clean design Synthesis and timing constraints Collaboration with algorithm, radio, power, SoC and software team to ensure performance and power efficiency Minimum Qualifications: BS and a minimum of 10 years relevant industry experience Strong fixed-point knowledge and extensive experience with bit-true verifications Understanding of DSP communication algorithms and trade-offs between performance and complexity Good knowledge in modern design techniques and energy-efficient/low power logic design Ability to work well in a team and be
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