Wireless FPGA Prototype Design Engineer
Apple - San Francisco Bay Area, United States of America
Posted Apr 25, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
- Not verified last checked Jun 13, 2026
- Salary
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- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Wireless FPGA Prototype Design Engineer San Francisco Bay Area, United States of America Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient/low-power design and new technologies that transform the user experience at the product level, all of which is driven by a world class vertically integrated engineering teams. As a Wireless ASIC/FPGA Prototyping Design Engineer, you will work in a team developing signal processing intensive design for wireless communication SoCs. You will be at the center of the silicon design group with a meaningful role getting functional products to millions of customers quickly. Wouldn't you love a dynamic, yet challenging role as a Wireless FPGA Prototype Design Engineer here at Apple? As a Wireless ASIC/FPGA Prototyping Design Engineer, you will work in a team developing signal processing intensive design for wireless communication SoCs, including: - ASIC prototyping from requirement to implementation and lab debug - FPGA synthesis, define timing constraints, timing closure - Maintain common design platform for ASIC as well as FPGA, with considerations for memories, I/O pads, gated clocks and complex generated clocks - Bring-up, debug and test FPGA/emulation model and collaterals in the lab - Support pre-Silicon and post-silicon validation and collaborate Minimum Qualifications: Minimum requirement of a bachelors degree Experience in FPGA flow Knowledge of digital design, chip architecture and microarchitecture Experience in Scripting and modeling language experience (Shell, C, Python or Perl)
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